SUMMARY / RELATED TOPICS

Kensington, San Diego

Kensington is a neighborhood of San Diego, California. Its borders are defined by Interstate 15 to the west, Interstate 8 to the north, Fairmount Avenue to the east, Monroe Street to the south, its neighboring communities are Normal Heights to the west, City Heights to the south. Kensington was founded in 1910 when a map was filed on April 9, 1910; the map contains the name of two sisters who owned the land which became the Kensington Park subdivision. Abby Hitchcock and Mary Gleason inherited the ex-Rancho Mission land from the estate of their deceased brother and mother. Abby's husband was a realtor, her brother-in-law was a land use attorney and early mover-and-shaker in San Diego. Through the Hitchcock brothers, a connection was made to William Douglas, a real estate promoter from Los Angeles. Douglas' name appears on the original Kensington Park map. William Douglas handled the early sales of lots. A newspaper announcement heralded the opening of the Kensington Park subdivision for lot sales on November 25, 1910.

The owners had managed to convince the officials of the San Diego Electric Railway company to extend the Adams Avenue trolley line into Kensington Park in time for the opening. The first houses were all of the Craftsman style; the original Kensington Park subdivision stretched from Ward Canyon on the west, to County Line Road on the east, from Monroe Avenue on the south to Jefferson Avenue on the north. Kensington Park was annexed to the City of San Diego in 1952. Sometime in 1913, the two sisters sold their interest in the Kensington Park land to a consortium of former executives from the Santa Fe Railway Company, headed by G. Aubrey Davidson. Davidson redrew the map of Kensington Park and acquired more land to the north to develop Kensington Manor. Subdivisions followed, including Kensington Heights, Kensington Park Annex; these areas today are known collectively as "Kensington". From its beginnings in 1910, Kensington was serviced by route 11 of the San Diego Electric Railway via a wooden trestle bridge across Ward canyon.

Automobile access from Adams was added in 1913. During the time of that service, the line ran several notable streetcar designs including the San Diego Class 1 StreetCar, one of the first "pay as you enter" designs in the nation, "The Presidents' Conference Committee" design, both built by the St. Louis Car Company. Streetcar service to the neighborhood continued until 1949 when the last of San Diego's street car lines were abandoned; the name Kensington echoes the name of a district of west London. However, the origins of the name are in dispute, as the Hall sisters were from Natick, Massachusetts, an area where many of the street and town names resemble English place names, some of which are echoed in Kensington street names; the area has kept its "small town" community feel since it was founded. Annual traditions include neighborhood-wide parties such as the Memorial Day Parade and the Fourth Of July Block Party/ Street Basketball Tournament. Most streets have their own "annual parties". A neon "Kensington" sign hangs over Adams Avenue, which acts as the neighborhood's cultural and business center.

This sign, after a year of needing repair, was taken down to be replaced. However, the sign was one of only two original neon neighborhood signs remaining in San Diego, having been bought and installed by the community in 1953. A Kensington resident performed the necessary research and submitted it to the City of San Diego's Historical Resources Board for consideration as an historical resource; the HRB voted unanimously on April 24, 2008 to designate the "Kensington Neon Sign" as HRB historic site #865. As a designated historic resource, the sign had to be professionally evaluated for repair or replacement in accordance with the Secretary of the Interior Standards; the sign was found to be in repairable condition, the president of the Kensington Talmadge Community Association, keepers of the sign, directed a neon sign company to dismantle the old sign, which destroyed the structural integrity such that repair was no longer possible. The City's Historic Resources staff directed the KTCA to replicate the original sign and install it back above Adams Avenue.

The sign was re-installed in November, 2010. Many street names in the community have English origins; the residential area has an impressive collection of Spanish Revival style homes, this being the most popular style in San Diego during the late 1920s when much of Kensington was built out. Architects Cliff May and Richard Requa built important homes in Kensington, Requa, in particular, had a profound influence on the architecture and character of the Kensington neighborhood. Kensington and, San Diego, California|Talmadge]] are sometimes, but not grouped together as one community for purposes to reflect higher real estate values. Franklin Elementary School is located at the edge of Kensington and celebrated its eightieth anniversary, it teaches school for children in kindergarten through fifth grade. The athletic field was re-designed and is now open to the public at nearly all hours of the day. Kensington Terrace Heart of Kensington Heart of Kensington - a neighborhood resource for Kensington history and heritage New To San Diego

Package on package

Package on package is an integrated circuit packaging method to combine vertically discrete logic and memory ball grid array packages. Two or more packages are installed atop each other, i.e. stacked, with a standard interface to route signals between them. This allows higher component density in devices, such as mobile phones, personal digital assistants, digital cameras. Two used configurations exist for PoP: Pure memory stacking: two or more memory only packages are stacked on each other Mixed logic-memory stacking: logic package on the bottom, memory package on top. For example, the bottom could be a system on a chip for a mobile phone; the logic package is on the bottom. During PCB assembly, the bottom package of a PoP stack is placed directly on the PCB, the other package of the stack are stacked on top; the packages of a PoP stack become attached to each other during reflow soldering. The package on package technique tries to combine the benefits of traditional packaging with the benefits of die-stacking techniques, while avoiding their drawbacks.

Traditional packaging places each die in its own package, a package designed for normal PCB assembly techniques that place each package directly on the PCB side-by-side. The 3D die-stacking system in package techniques stacks multiple die in a single package, which has several advantages and some disadvantages compared to traditional PCB assembly. In embedded PoP techniques, chips are embedded in a substrate on the bottom of the package; this PoP technology enables smaller packages with shorter electrical connections and is supported by companies such as Advanced Semiconductor Engineering. The most obvious benefit is motherboard space savings. PoP uses much less PCB area as little as stacked-die packages. Electrically, PoP offers benefits by minimizing track length between different interoperating parts, such as a controller and memory; this yields better electrical performance of devices, since shorter routing of interconnections between circuits yields faster signal propagation and reduced noise and cross-talk.

There are several key differences between stacked-package products. The main financial benefit of package on package is that the memory device is decoupled from the logic device; therefore this gives PoP all the same advantages that traditional packaging has over stacked-die products: The memory package can be tested separately from the logic package Only "known good" packages are used in final assembly. Compare this to stacked-die packages where the entire set is useless and rejected if either the memory or logic is bad; the end user controls the logistics. This means memory from different suppliers can be used at different times without changing the logic; the memory becomes a commodity to be sourced from the lowest cost supplier. This trait is a benefit compared to PiP which requires a specific memory device to be designed in and sourced upstream of the end user. Any mechanically mating top package can be used. For a low-end phone, a smaller memory configuration may be used on the top package.

For a high-end phone, more memory could be used with the same bottom package. This simplifies inventory control by the OEM. For a stacked-die package or PiP, the exact memory configuration must be known weeks or months in advance; because the memory only comes into the mix at final assembly, there is no reason for logic suppliers to source any memory. With a stacked-die device, the logic provider must buy wafers of memory from a memory supplier. JEDEC JC-11 committee deals with package outline drawing standards related to the bottom PoP package. See documents MO-266A and JEDEC publication 95, Design Guide 4.22. JEDEC JC-63 committee deals with top PoP package pinout standardization. See JEDEC Standard No. 21-C, Page 3.12.2 – 1 Package on package is known by other names: PoP: refers to the combined top and bottom packages PoPt: refers to the top package PoPb: refers to the bottom package PSvfBGA: refers to the bottom package: Package Stackable Very thin Fine pitch Ball Grid Array PSfcCSP: refers to the bottom package: Package Stackable Flip Chip Chip Scale Package In 2001, a Toshiba research team including T. Imoto, M. Matsui and C.

Takubo developed a "System Block Module" wafer bonding process for manufacturing 3D integrated circuit packages. The earliest known commercial use of a 3D package-on-package chip was in Sony's PlayStation Portable handheld game console, released in 2004; the PSP hardware includes eDRAM memory manufactured by Toshiba in a 3D package chip with two dies stacked vertically. Toshiba called it "semi-embedded DRAM" at the time, before calling it a stacked "chip-on-chip" solution. In April 2007, Toshiba commercialized an eight-layer 3D chip package, the 16 GB THGAM embedded NAND flash memory chip, manufactured with eight stacked 2 GB NAND flash chips; the same month, U. S. Patent 7,923,830 was filed by Steven M. Pope and Ruben C. Zeta of Maxim Integrated. In September 2007, Hynix Semiconductor introduced 24-layer 3D packaging technology, with a 16 GB flash memory chip, manufactured with 24 stacked NAND flash chips using a wafer bonding process. Innovations push Package on Package into new markets, Flynn Carson, Semiconductor International, April 2010 Practical Components PoP Samples and Test Boards Package-on-Package: The Story Behind This Industry Hit Package-on-p