Instruction set architecture
An ISA includes a specification of the set of opcodes, and the native commands implemented by a particular processor. An instruction set architecture is distinguished from a microarchitecture, which is the set of design techniques used, in a particular processor. Processors with different microarchitectures can share a common instruction set, for example, the Intel Pentium and the AMD Athlon implement nearly identical versions of the x86 instruction set, but have radically different internal designs. The concept of an architecture, distinct from the design of a machine, was developed by Fred Brooks at IBM during the design phase of System/360. Prior to NPL, the companys computer designers had been free to honor cost objectives not only by selecting technologies, the SPREAD compatibility objective, in contrast, postulated a single architecture for a series of five processors spanning a wide range of cost and performance. In addition, these virtual machines execute less frequently used code paths by interpretation, transmeta implemented the x86 instruction set atop VLIW processors in this fashion. A complex instruction set computer has many specialized instructions, some of which may only be used in practical programs.
Theoretically important types are the instruction set computer and the one instruction set computer. Another variation is the very long instruction word where the processor receives many instructions encoded and retrieved in one instruction word, machine language is built up from discrete statements or instructions. Examples of operations common to many instruction sets include, Set a register to a constant value. Copy data from a location to a register, or vice versa. Used to store the contents of a register, result of a computation, often called load and store operations. Read and write data from hardware devices, subtract, multiply, or divide the values of two registers, placing the result in a register, possibly setting one or more condition codes in a status register. Increment, decrement in some ISAs, saving operand fetch in trivial cases, perform bitwise operations, e. g. taking the conjunction and disjunction of corresponding bits in a pair of registers, taking the negation of each bit in a register.
Floating-point instructions for arithmetic on floating-point numbers, branch to another location in the program and execute instructions there. Conditionally branch to another if a certain condition holds. Call another block of code, while saving the location of the instruction as a point to return to. Load/store data to and from a coprocessor, or exchanging with CPU registers, processors may include complex instructions in their instruction set
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California that was founded by Gordon Moore and Robert Noyce. It is the worlds largest and highest valued semiconductor chip makers based on revenue, and is the inventor of the x86 series of microprocessors, Intel supplies processors for computer system manufacturers such as Apple, Lenovo, HP, and Dell. Intel Corporation was founded on July 18,1968, by semiconductor pioneers Robert Noyce and Gordon Moore, the companys name was conceived as portmanteau of the words integrated and electronics. The fact that intel is the term for intelligence information made the name appropriate. Intel was a developer of SRAM and DRAM memory chips. Although Intel created the worlds first commercial microprocessor chip in 1971, during the 1990s, Intel invested heavily in new microprocessor designs fostering the rapid growth of the computer industry. The Open Source Technology Center at Intel hosts PowerTOP and LatencyTOP, and supports other projects such as Wayland, Intel Array Building Blocks, and Threading Building Blocks.
Client Computing Group – 55% of 2016 revenues – produces hardware components used in desktop, data Center Group – 29% of 2016 revenues – produces hardware components used in server and storage platforms. Internet of Things Group – 5% of 2016 revenues – offers platforms designed for retail, industrial, non-Volatile Memory Solutions Group – 4% of 2016 revenues – manufactures NAND flash memory products primarily used in solid-state drives. Intel Security Group – 4% of 2016 revenues – produces software, particularly security, programmable Solutions Group – 3% of 2016 revenues – manufactures programmable semiconductors. In 2016, Dell accounted for 15% of Intels total revenues, Lenovo accounted for 13% of total revenues, in the 1980s, Intel was among the top ten sellers of semiconductors in the world. In 1991, Intel became the biggest chip maker by revenue and has held the position ever since, other top semiconductor companies include TSMC, Advanced Micro Devices, Texas Instruments, Toshiba and STMicroelectronics.
Competitors in PC chip sets include Advanced Micro Devices, VIA Technologies, Silicon Integrated Systems, the cross-licensing agreement is canceled in the event of an AMD bankruptcy or takeover. Some smaller competitors such as VIA Technologies produce low-power x86 processors for small factor computers, the advent of such mobile computing devices, in particular, has in recent years led to a decline in PC sales. Since over 95% of the worlds smartphones currently use processors designed by ARM Holdings, ARM is planning to make inroads into the PC and server market. Intel has been involved in disputes regarding violation of antitrust laws. Intel was founded in Mountain View, California in 1968 by Gordon E. Moore, a chemist, and Robert Noyce, arthur Rock helped them find investors, while Max Palevsky was on the board from an early stage. Moore and Noyce had left Fairchild Semiconductor to found Intel, Rock was not an employee, but he was an investor and was chairman of the board
Physical Address Extension
In computing, Physical Address Extension, sometimes referred to as Page Address Extension, is a memory management feature for the IA-32 architecture. PAE was first introduced in the Pentium Pro and it defines a page table hierarchy of three levels, with table entries of 64 bits each instead of 32, allowing these CPUs to access a physical address space larger than 4 gigabytes. It uses the topmost bit of the 64-bit page table entry as an NX bit, PAE was first implemented in the Intel Pentium Pro in 1995, although the accompanying chipsets usually lacked support for the required extra address bits. PAE is supported by Intel Pentium Pro and Pentium-series processors, the first Pentium M family processors introduced in 2003 support PAE, they do not show the PAE support flag in their CPUID information. It was available on AMD processors including the AMD Athlon, when AMD defined their AMD64 architecture as an extension of x86, they defined an enhanced version of PAE to be used while the processor was in 64-bit mode.
It supports up to 48-bit virtual addresses, 52-bit physical addresses and this version of PAE is the mandatory memory paging model in long mode on x86-64 processors, there is no non-PAE mode while in long mode. The documentation for Intel 64, the Intel version of x86-64, with PAE, IA-32 architecture is augmented with additional address lines used to select the additional memory, so physical address size increases from 32 bits to 36 bits. This increases the physical memory addressable by the system from 4 GB to 64 GB, the 32-bit size of the virtual address is not changed, so regular application software continues to use instructions with 32-bit addresses and is limited to 4 gigabytes of virtual address space. Operating systems supporting this mode use page tables to map the regular 4 GB address space into the physical memory, the mapping is typically applied separately for each process, so that the extra memory is useful even though no single regular application can access it all simultaneously.
Later work associated with AMDs development of x86-64 architecture expanded the theoretical possible size of addresses to 52 bits. Enabling PAE causes major changes to this scheme, by default, the size of each page remains as 4 KB. Each entry in the table and page directory becomes 64 bit long, instead of 32 bits. However, the size of tables does not change, so both table and directory now have only 512 entries, the entries in the page directory have an additional flag in bit 7, named PS. If the system has set this bit to 1, the directory entry does not point to a page table but to a single. In processors that implement the no-execute or execution disable feature, the most significant bit is the NX bit, the next eleven most significant bits are reserved for operating system use by both Intel and AMDs architecture specifications. Thus, from 64 bits in the table entry,12 low-order and 12 high-order bits have other uses. Combined with 12 bits of offset within page from the linear address and this allows a maximum RAM configuration of 252 bytes, or 4 petabytes.
Currently 48 bits of virtual page number are translated, giving an address space of up to 256 TB
Pentium 4 was a line of single-core central processing units for desktops and entry-level servers introduced by Intel on November 20,2000 and shipped through August 8,2008. They had a seventh-generation x86 microarchitecture, called NetBurst, which was the companys first all-new design since the introduction of the P6 microarchitecture of the Pentium Pro CPUs in 1995, NetBurst differed from P6 by featuring a very deep instruction pipeline to achieve very high clock speeds. Intel claimed that NetBurst would allow speeds of up to 10 GHz in future chips, however. In 2004, the initial 32-bit x86 instruction set of the Pentium 4 microprocessors was extended by the 64-bit x86-64 set, the first Pentium 4 cores, codenamed Willamette, were clocked from 1.3 GHz to 2 GHz. They were released on November 20,2000, using the Socket 423 system, notable with the introduction of the Pentium 4 was the 400 MT/s FSB. It actually operated at 100 MHz, but the FSB was quad-pumped, meaning that the transfer rate was four times the base clock of the bus.
The AMD Athlons double-pumped FSB was running at 100 or 133 MHz at that time, Pentium 4 CPUs introduced the SSE2 and, in the Prescott-based Pentium 4s, SSE3 instruction sets to accelerate calculations, media processing, 3D graphics, and games. Later versions featured Hyper-Threading Technology, a feature to one physical CPU work as two logical CPUs. Intel marketed a version of their low-end Celeron processors based on the NetBurst microarchitecture, in 2005, the Pentium 4 was complemented by the Pentium D and Pentium Extreme Edition dual-core CPUs. In benchmark evaluations, the advantages of the NetBurst microarchitecture were unclear, with carefully optimized application code, the first Pentium 4s outperformed Intels fastest Pentium III, as expected. But in legacy applications with many branching or x87 floating-point instructions and its main handicap was a shared unidirectional bus. Furthermore, the NetBurst microarchitecture consumed more power and emitted more heat than any previous Intel or AMD microarchitectures, as a result, the Pentium 4s introduction was met with mixed reviews, Developers disliked the Pentium 4, as it posed a new set of code optimization rules.
For example, in applications, AMDs lower-clocked Athlon easily outperformed the Pentium 4. Tom Yager of Infoworld magazine called it the fastest CPU - for programs that fit entirely in cache, computer-savvy buyers avoided Pentium 4 PCs due to their price premium, questionable benefit, and initial restriction to Rambus RAM. In terms of marketing, the Pentium 4s singular emphasis on clock frequency made it a marketers dream. The result of this was that the NetBurst microarchitecture was often referred to as a marchitecture by various computing websites and it was called NetBust, a term popular with reviewers who reflected negatively upon the processors performance. The two classical metrics of CPU performance are IPC and clock speed, while IPC is difficult to quantify due to dependence on the benchmark applications instruction mix, clock speed is a simple measurement yielding a single absolute number. Unsophisticated buyers would simply consider the processor with the highest clock speed to be the best product, because AMDs processors had slower clock speeds, it countered Intels marketing advantage with the megahertz myth campaign
AOpen is a major electronics manufacturer from Taiwan that makes computers and parts for computers. AOpen used to be the Open System Business Unit of Acer Computer Inc. which designed, manufactured and it was incorporated in December 1996 as a subsidiary of Acer Group with an initial public offering at the Taiwan stock exchange in August 2002. It is the first subsidiary which established the paradigm in the pan-Acer Group. Currently, AOpen is a subsidiary of Wistron Group, a spin-off of the Acer Group and they are perhaps most well known for their Mobile on Desktop solutions, which implements Intels Pentium M platform on desktop motherboards. AOPens founders built a company around the idea of open & share, the ampersand represents one of the images of the entire corporate identity. AOPen specializes in small form factor platform applications, and product development. Since 2005 AOpen has been developing energy-saving products, according to different types of customers and contexts, AOpen splits its product platforms into two major categories, digital signage platform and SFF platform.
There are six parts in AOpens digital signage platform applications, media player, deployment, extension. AOPEN develops SFF platform products to fulfill end users’ needs, such as HTPC and gaming PC in digital homes, in addition, AOPEN develops SFF business PC for business applications, such as kiosk and POS. AOPEN supplies a variety of I/O components, including case, keyboard. List of companies of Taiwan Official website
The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1,1995. It introduced the P6 microarchitecture and was intended to replace the original Pentium in a full range of applications. While the Pentium and Pentium MMX had 3.1 and 4.5 million transistors, the Pentium Pro contained 5.5 million transistors. Later, it was reduced to a narrow role as a server and high-end desktop processor and was used in supercomputers like ASCI Red. The Pentium Pro was capable of both dual- and quad-processor configurations and it only came in one form factor, the relatively large rectangular Socket 8. The Pentium Pro was succeeded by the Pentium II Xeon in 1998, the lead architect of Pentium Pro was Fred Pollack who was specialized in superscalarity and had worked as the lead engineer of Intel iAPX432. The Pentium Pro incorporated a new microarchitecture in a departure from the Pentium x86 architecture and it has a decoupled, 14-stage superpipelined architecture which used an instruction pool.
The Pentium Pro featured many advanced concepts not found in the Pentium, the Pentium Pro thus featured out of order execution, including speculative execution via register renaming. It had a wider 36-bit address bus, allowing it to access up to 64GB of memory, the Pentium Pro has an 8 KiB instruction cache, from which up to 16 bytes are fetched on each cycle and sent to the instruction decoders. The decoders are not equal in capability, only one can decode any x86 instruction and this restricts the Pentium Pros ability to decode multiple instructions simultaneously, limiting superscalar execution. X86 instructions are decoded into 118-bit micro-operations, the micro-ops are RISC-like, that is, they encode an operation, two sources, and a destination. The general decoder can generate up to four micro-ops per cycle, thus, x86 instructions that operate on the memory can only be processed by the general decoder, as this operation requires a minimum of three micro-ops. Likewise, the simple decoders are limited to instructions that can be translated into one micro-op, instructions that require more micro-ops than four are translated with the assistance of a sequencer, which generates the required micro-ops over multiple clock cycles.
Micro-ops exit the re-order buffer and enter a station, where they await dispatch to the execution units. In each clock cycle, up to five micro-ops can be dispatched to five execution units, the Pentium Pro has a total of six execution units, two integer units, one floating-point unit, a load unit, store address unit, and a store data unit. Of the two units, only one has the full complement of functions such as a barrel shifter and divider. The second integer unit, which shares paths with the FPU, does not have facilities and is limited to simple operations such as add, subtract. Addition and multiplication are pipelined and have a latency of three and five cycles, respectively and square-root are not pipelined and are executed in separate units that share the FPUs ports
A given ISA may be implemented with different microarchitectures, implementations may vary due to different goals of a given design or due to shifts in technology. Computer architecture is the combination of microarchitecture and instruction set, the ISA is roughly the same as the programming model of a processor as seen by an assembly language programmer or compiler writer. The ISA includes the execution model, processor registers, the microarchitecture includes the constituent parts of the processor and how these interconnect and interoperate to implement the ISA. These diagrams generally separate the datapath and the control path, the person designing a system usually draws the specific microarchitecture as a kind of data flow diagram. Like a block diagram, the diagram shows microarchitectural elements such as the arithmetic and logic unit. Typically, the diagram connects those elements with arrows, thick lines, very simple computers have a single data bus organization – they have a single three-state bus.
The diagram of more complex computers usually shows multiple three-state buses, each microarchitectural element is in turn represented by a schematic describing the interconnections of logic gates used to implement it. Each logic gate is in turn represented by a circuit diagram describing the connections of the used to implement it in some particular logic family. Machines with different microarchitectures may have the instruction set architecture. In principle, a single microarchitecture could execute several different ISAs with only changes to the microcode. The pipelined datapath is the most commonly used design in microarchitecture today. This technique is used in most modern microprocessors, the pipelined architecture allows multiple instructions to overlap in execution, much like an assembly line. The pipeline includes several different stages which are fundamental in microarchitecture designs, some of these stages include instruction fetch, instruction decode and write back. Some architectures include other stages such as memory access, the design of pipelines is one of the central microarchitectural tasks.
Execution units are essential to microarchitecture. Execution units include arithmetic logic units, floating point units, load/store units, branch prediction and these units perform the operations or calculations of the processor. The choice of the number of units, their latency. The size, latency and connectivity of memories within the system are microarchitectural decisions, system-level design decisions such as whether or not to include peripherals, such as memory controllers, can be considered part of the microarchitectural design process
In computer architecture, a branch predictor is a digital circuit that tries to guess which way a branch will go before this is known for sure. The purpose of the predictor is to improve the flow in the instruction pipeline. Branch predictors play a role in achieving high effective performance in many modern pipelined microprocessor architectures such as x86. Two-way branching is usually implemented with a jump instruction. Without branch prediction, the processor would have to wait until the conditional jump instruction has passed the stage before the next instruction can enter the fetch stage in the pipeline. The branch predictor attempts to avoid waste of time by trying to guess whether the conditional jump is most likely to be taken or not taken. The branch that is guessed to be the most likely is fetched, the time that is wasted in case of a branch misprediction is equal to the number of stages in the pipeline from the fetch stage to the execute stage. Modern microprocessors tend to have quite long pipelines so that the delay is between 10 and 20 clock cycles.
As a result, making a pipeline longer increases the need for a more advanced branch predictor, the first time a conditional jump instruction is encountered, there is not much information to base a prediction on. But the branch predictor keeps records of whether branches are taken or not taken, when it encounters a conditional jump that has been seen several times before it can base the prediction on the history. The branch predictor may, for example, recognize that the jump is taken more often than not. Branch prediction is not the same as branch target prediction, Branch prediction attempts to guess whether a conditional jump will be taken or not. Branch target prediction attempts to guess the target of a conditional or unconditional jump before it is computed by decoding and executing the instruction itself. Branch prediction and branch target prediction are often combined into the same circuitry, static prediction is the simplest branch prediction technique because it does not rely on information about the dynamic history of code executing.
Instead it predicts the outcome of a branch based solely on the branch instruction, only when the branch or jump is evaluated and found to be taken, does the instruction pointer get set to a non-sequential address. Both CPUs evaluate branches in the stage and have a single cycle instruction fetch. As a result, the branch target recurrence is two long, and the machine always fetches the instruction immediately after any taken branch. Both architectures define branch delay slots in order to utilize these fetched instructions, a more advanced form of static prediction presumes that backward branches will be taken and that forward branches will not
An embedded system is a computer system with a dedicated function within a larger mechanical or electrical system, often with real-time computing constraints. It is embedded as part of a device often including hardware. Embedded systems control many devices in use today. Ninety-eight percent of all microprocessors are manufactured as components of embedded systems, examples of properties of typically embedded computers when compared with general-purpose counterparts are low power consumption, small size, rugged operating ranges, and low per-unit cost. This comes at the price of limited processing resources, which make them more difficult to program. For example, intelligent techniques can be designed to power consumption of embedded systems. Modern embedded systems are based on microcontrollers, but ordinary microprocessors are common. In either case, the processor used may be ranging from general purpose to those specialised in certain class of computations. A common standard class of dedicated processors is the signal processor.
Since the embedded system is dedicated to tasks, design engineers can optimize it to reduce the size and cost of the product and increase the reliability. Some embedded systems are mass-produced, benefiting from economies of scale, complexity varies from low, with a single microcontroller chip, to very high with multiple units and networks mounted inside a large chassis or enclosure. One of the very first recognizably modern embedded systems was the Apollo Guidance Computer, an early mass-produced embedded system was the Autonetics D-17 guidance computer for the Minuteman missile, released in 1961. When the Minuteman II went into production in 1966, the D-17 was replaced with a new computer that was the first high-volume use of integrated circuits. Since these early applications in the 1960s, embedded systems have come down in price and there has been a rise in processing power. An early microprocessor for example, the Intel 4004, was designed for calculators and other systems but still required external memory.
By the early 1980s, memory and output system components had been integrated into the chip as the processor forming a microcontroller. Microcontrollers find applications where a computer would be too costly. A comparatively low-cost microcontroller may be programmed to fulfill the role as a large number of separate components
A microprocessor is a computer processor which incorporates the functions of a computers central processing unit on a single integrated circuit, or at most a few integrated circuits. Microprocessors contain both combinational logic and sequential digital logic, Microprocessors operate on numbers and symbols represented in the binary numeral system. The integration of a whole CPU onto a chip or on a few chips greatly reduced the cost of processing power. Integrated circuit processors are produced in numbers by highly automated processes resulting in a low per unit cost. Single-chip processors increase reliability as there are many electrical connections to fail. As microprocessor designs get better, the cost of manufacturing a chip generally stays the same, before microprocessors, small computers had been built using racks of circuit boards with many medium- and small-scale integrated circuits. Microprocessors combined this into one or a few large-scale ICs, the internal arrangement of a microprocessor varies depending on the age of the design and the intended purposes of the microprocessor.
Advancing technology makes more complex and powerful chips feasible to manufacture, a minimal hypothetical microprocessor might only include an arithmetic logic unit and a control logic section. The ALU performs operations such as addition and operations such as AND or OR, each operation of the ALU sets one or more flags in a status register, which indicate the results of the last operation. The control logic retrieves instruction codes from memory and initiates the sequence of operations required for the ALU to carry out the instruction, a single operation code might affect many individual data paths and other elements of the processor. As integrated circuit technology advanced, it was feasible to manufacture more and more complex processors on a single chip, the size of data objects became larger, allowing more transistors on a chip allowed word sizes to increase from 4- and 8-bit words up to todays 64-bit words. Additional features were added to the architecture, more on-chip registers sped up programs.
Floating-point arithmetic, for example, was not available on 8-bit microprocessors. Integration of the point unit first as a separate integrated circuit and as part of the same microprocessor chip. Occasionally, physical limitations of integrated circuits made such practices as a bit slice approach necessary, instead of processing all of a long word on one integrated circuit, multiple circuits in parallel processed subsets of each data word. With the ability to put large numbers of transistors on one chip and this CPU cache has the advantage of faster access than off-chip memory, and increases the processing speed of the system for many applications. Processor clock frequency has increased more rapidly than external memory speed, except in the recent past, a microprocessor is a general purpose system. Several specialized processing devices have followed from the technology, A digital signal processor is specialized for signal processing, graphics processing units are processors designed primarily for realtime rendering of 3D images
The Pentium II brand refers to Intels sixth-generation microarchitecture and x86-compatible microprocessors introduced on May 7,1997. Containing 7.5 million transistors, the Pentium II featured a version of the first P6-generation core of the Pentium Pro. However, its L2 cache subsystem was a downgrade when compared to Pentium Pros, in early 1999, the Pentium II was superseded by the almost identical Pentium III, which basically only added SSE instructions to the CPU. The Celeron was characterized by a reduced or omitted on-die full-speed L2 cache, the Xeon was characterized by a range of full-speed L2 cache, a 100 MT/s FSB, a different physical interface, and support for symmetric multiprocessing. The Pentium II microprocessor was largely based upon the microarchitecture of its predecessor, the Pentium Pro, unlike previous Pentium and Pentium Pro processors, the Pentium II CPU was packaged in a slot-based module rather than a CPU socket. The processor and associated components were carried on a similar to a typical expansion board within a plastic cartridge.
A fixed or removable heatsink was carried on one side, sometimes using its own fan and this larger package was a compromise allowing Intel to separate the secondary cache from the processor while still keeping it on a closely coupled back-side bus. The L2 cache ran at half the processors clock frequency, unlike the Pentium Pro, the smallest cache size was increased to 512 KB from the 256 KB on the Pentium Pro. Off-package cache solved the Pentium Pros low yields, allowing Intel to introduce the Pentium II at a price level. Intel improved 16-bit code execution performance on the Pentium II, an area in which the Pentium Pro was at a notable handicap, most consumer software of the day was still using at least some 16-bit code, because of a variety of factors. The Pentium II featured 32 KB of L1 cache, double that of the Pentium Pro, the Pentium II was the first P6-based CPU to implement the Intel MMX integer SIMD instruction set which had already been introduced on the Pentium MMX. The Pentium II was basically a more consumer-oriented version of the Pentium Pro and it was cheaper to manufacture because of the separate, slower L2 cache memory.
The improved 16-bit performance and MMX support made it a choice for consumer-level operating systems, such as Windows 9x. Combined with the larger L1 cache and improved 16-bit performance, the slower and cheaper L2 caches performance impact was reduced, general processor performance was increased while costs were cut. While this limit was practically irrelevant for the home user at the time. Presumably, Intel put this limitation deliberately in place to distinguish the Pentium II from the higher end Pentium Pro line. The 82459AD revision of the chip on some 333 MHz and all 350 MHz and faster Pentium IIs lifted this restriction, the original Klamath Pentium II microprocessor ran at 233,266, and 300 MHz and were produced in a 0.35 µm process. The 300 MHz version, only available in quantities in 1997
Israel, officially the State of Israel, is a country in the Middle East, on the southeastern shore of the Mediterranean Sea and the northern shore of the Red Sea. The country contains geographically diverse features within its small area. Israels economy and technology center is Tel Aviv, while its seat of government and proclaimed capital is Jerusalem, in 1947, the United Nations adopted a Partition Plan for Mandatory Palestine recommending the creation of independent Arab and Jewish states and an internationalized Jerusalem. The plan was accepted by the Jewish Agency for Palestine, next year, the Jewish Agency declared the establishment of a Jewish state in Eretz Israel, to be known as the State of Israel. Israel has since fought several wars with neighboring Arab states, in the course of which it has occupied territories including the West Bank, Golan Heights and it extended its laws to the Golan Heights and East Jerusalem, but not the West Bank. Israels occupation of the Palestinian territories is the worlds longest military occupation in modern times, efforts to resolve the Israeli–Palestinian conflict have not resulted in peace.
However, peace treaties between Israel and both Egypt and Jordan have successfully been signed, the population of Israel, as defined by the Israel Central Bureau of Statistics, was estimated in 2017 to be 8,671,100 people. It is the worlds only Jewish-majority state, with 74. 8% being designated as Jewish, the countrys second largest group of citizens are Arabs, at 20. 8%. The great majority of Israeli Arabs are Sunni Muslims, including significant numbers of semi-settled Negev Bedouins, other minorities include Arameans, Assyrians, Black Hebrew Israelites, Circassians and Samaritans. Israel hosts a significant population of foreign workers and asylum seekers from Africa and Asia, including illegal migrants from Sudan, Eritrea. In its Basic Laws, Israel defines itself as a Jewish, Israel is a representative democracy with a parliamentary system, proportional representation and universal suffrage. The prime minister is head of government and the Knesset is the legislature, Israel is a developed country and an OECD member, with the 35th-largest economy in the world by nominal gross domestic product as of 2016.
The country benefits from a skilled workforce and is among the most educated countries in the world with one of the highest percentage of its citizens holding a tertiary education degree. The country has the highest standard of living in the Middle East and the third highest in Asia, in the early weeks of independence, the government chose the term Israeli to denote a citizen of Israel, with the formal announcement made by Minister of Foreign Affairs Moshe Sharett. The names Land of Israel and Children of Israel have historically used to refer to the biblical Kingdom of Israel. The name Israel in these phrases refers to the patriarch Jacob who, jacobs twelve sons became the ancestors of the Israelites, known as the Twelve Tribes of Israel or Children of Israel. The earliest known artifact to mention the word Israel as a collective is the Merneptah Stele of ancient Egypt. The area is known as the Holy Land, being holy for all Abrahamic religions including Judaism, Islam