1.
Central processing unit
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The computer industry has used the term central processing unit at least since the early 1960s. The form, design and implementation of CPUs have changed over the course of their history, most modern CPUs are microprocessors, meaning they are contained on a single integrated circuit chip. An IC that contains a CPU may also contain memory, peripheral interfaces, some computers employ a multi-core processor, which is a single chip containing two or more CPUs called cores, in that context, one can speak of such single chips as sockets. Array processors or vector processors have multiple processors that operate in parallel, there also exists the concept of virtual CPUs which are an abstraction of dynamical aggregated computational resources. Early computers such as the ENIAC had to be rewired to perform different tasks. Since the term CPU is generally defined as a device for software execution, the idea of a stored-program computer was already present in the design of J. Presper Eckert and John William Mauchlys ENIAC, but was initially omitted so that it could be finished sooner. On June 30,1945, before ENIAC was made, mathematician John von Neumann distributed the paper entitled First Draft of a Report on the EDVAC and it was the outline of a stored-program computer that would eventually be completed in August 1949. EDVAC was designed to perform a number of instructions of various types. Significantly, the programs written for EDVAC were to be stored in high-speed computer memory rather than specified by the wiring of the computer. This overcame a severe limitation of ENIAC, which was the considerable time, with von Neumanns design, the program that EDVAC ran could be changed simply by changing the contents of the memory. Early CPUs were custom designs used as part of a larger, however, this method of designing custom CPUs for a particular application has largely given way to the development of multi-purpose processors produced in large quantities. This standardization began in the era of discrete transistor mainframes and minicomputers and has accelerated with the popularization of the integrated circuit. The IC has allowed increasingly complex CPUs to be designed and manufactured to tolerances on the order of nanometers, both the miniaturization and standardization of CPUs have increased the presence of digital devices in modern life far beyond the limited application of dedicated computing machines. Modern microprocessors appear in electronic devices ranging from automobiles to cellphones, the so-called Harvard architecture of the Harvard Mark I, which was completed before EDVAC, also utilized a stored-program design using punched paper tape rather than electronic memory. Relays and vacuum tubes were used as switching elements, a useful computer requires thousands or tens of thousands of switching devices. The overall speed of a system is dependent on the speed of the switches, tube computers like EDVAC tended to average eight hours between failures, whereas relay computers like the Harvard Mark I failed very rarely. In the end, tube-based CPUs became dominant because the significant speed advantages afforded generally outweighed the reliability problems, most of these early synchronous CPUs ran at low clock rates compared to modern microelectronic designs. Clock signal frequencies ranging from 100 kHz to 4 MHz were very common at this time, the design complexity of CPUs increased as various technologies facilitated building smaller and more reliable electronic devices
2.
Front-side bus
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A front-side bus was a computer communication interface often used in Intel-chip-based computers during the 1990s and 2000s. The competing EV6 bus served the function for AMD CPUs. Both typically carry data between the processing unit and a memory controller hub, known as the northbridge. Depending on the implementation, some computers may also have a bus that connects the CPU to the cache. This bus and the connected to it are faster than accessing the system memory via the front-side bus. The speed of the front side bus is used as an important measure of the performance of a computer. The original front-side bus architecture has replaced by HyperTransport, Intel QuickPath Interconnect or Direct Media Interface in modern volume CPUs. The term came into use by Intel Corporation about the time the Pentium Pro and Pentium II products were announced, in the 1990s. Front side refers to the interface from the processor to the rest of the computer system, as opposed to the back side. An FSB is mostly used on PC-related motherboards, seldom with the data and address used in embedded systems. This design represented an improvement over the single system bus designs of the previous decades. Front-side buses usually connect the CPU and the rest of the hardware via a chipset, which Intel implemented as a northbridge and a southbridge. Other buses like the Peripheral Component Interconnect, Accelerated Graphics Port and these secondary system buses usually run at speeds derived from the front-side bus clock, but are not necessarily synchronized to it. In response to AMDs Torrenza initiative, Intel opened its FSB CPU socket to third party devices. Prior to this announcement, made in Spring 2007 at Intel Developer Forum in Beijing, Intel had very closely guarded who had access to the FSB, the first example was Field-programmable gate array co-processors, a result of collaboration between Intel-Xilinx-Nallatech and Intel-Altera-XtremeData. The frequency at which a processor operates is determined by applying a clock multiplier to the bus speed in some cases. For example, a running at 3200 MHz might be using a 400 MHz FSB. This means there is a clock multiplier setting of 8
3.
Instruction set architecture
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An ISA includes a specification of the set of opcodes, and the native commands implemented by a particular processor. An instruction set architecture is distinguished from a microarchitecture, which is the set of design techniques used, in a particular processor. Processors with different microarchitectures can share a common instruction set, for example, the Intel Pentium and the AMD Athlon implement nearly identical versions of the x86 instruction set, but have radically different internal designs. The concept of an architecture, distinct from the design of a machine, was developed by Fred Brooks at IBM during the design phase of System/360. Prior to NPL, the companys computer designers had been free to honor cost objectives not only by selecting technologies, the SPREAD compatibility objective, in contrast, postulated a single architecture for a series of five processors spanning a wide range of cost and performance. In addition, these virtual machines execute less frequently used code paths by interpretation, transmeta implemented the x86 instruction set atop VLIW processors in this fashion. A complex instruction set computer has many specialized instructions, some of which may only be used in practical programs. Theoretically important types are the instruction set computer and the one instruction set computer. Another variation is the very long instruction word where the processor receives many instructions encoded and retrieved in one instruction word, machine language is built up from discrete statements or instructions. Examples of operations common to many instruction sets include, Set a register to a constant value. Copy data from a location to a register, or vice versa. Used to store the contents of a register, result of a computation, often called load and store operations. Read and write data from hardware devices, add, subtract, multiply, or divide the values of two registers, placing the result in a register, possibly setting one or more condition codes in a status register. Increment, decrement in some ISAs, saving operand fetch in trivial cases, perform bitwise operations, e. g. taking the conjunction and disjunction of corresponding bits in a pair of registers, taking the negation of each bit in a register. Floating-point instructions for arithmetic on floating-point numbers, branch to another location in the program and execute instructions there. Conditionally branch to another if a certain condition holds. Call another block of code, while saving the location of the instruction as a point to return to. Load/store data to and from a coprocessor, or exchanging with CPU registers, processors may include complex instructions in their instruction set
4.
Microarchitecture
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A given ISA may be implemented with different microarchitectures, implementations may vary due to different goals of a given design or due to shifts in technology. Computer architecture is the combination of microarchitecture and instruction set, the ISA is roughly the same as the programming model of a processor as seen by an assembly language programmer or compiler writer. The ISA includes the execution model, processor registers, address, the microarchitecture includes the constituent parts of the processor and how these interconnect and interoperate to implement the ISA. These diagrams generally separate the datapath and the control path, the person designing a system usually draws the specific microarchitecture as a kind of data flow diagram. Like a block diagram, the diagram shows microarchitectural elements such as the arithmetic and logic unit. Typically, the diagram connects those elements with arrows, thick lines, very simple computers have a single data bus organization – they have a single three-state bus. The diagram of more complex computers usually shows multiple three-state buses, each microarchitectural element is in turn represented by a schematic describing the interconnections of logic gates used to implement it. Each logic gate is in turn represented by a circuit diagram describing the connections of the used to implement it in some particular logic family. Machines with different microarchitectures may have the instruction set architecture. In principle, a single microarchitecture could execute several different ISAs with only changes to the microcode. The pipelined datapath is the most commonly used design in microarchitecture today. This technique is used in most modern microprocessors, microcontrollers, the pipelined architecture allows multiple instructions to overlap in execution, much like an assembly line. The pipeline includes several different stages which are fundamental in microarchitecture designs, some of these stages include instruction fetch, instruction decode, execute, and write back. Some architectures include other stages such as memory access, the design of pipelines is one of the central microarchitectural tasks. Execution units are essential to microarchitecture. Execution units include arithmetic logic units, floating point units, load/store units, branch prediction and these units perform the operations or calculations of the processor. The choice of the number of units, their latency. The size, latency, throughput and connectivity of memories within the system are also microarchitectural decisions, system-level design decisions such as whether or not to include peripherals, such as memory controllers, can be considered part of the microarchitectural design process
5.
P6 (microarchitecture)
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The P6 microarchitecture is the sixth-generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is sometimes referred to as i686 and it was succeeded by the NetBurst microarchitecture in 2000, but eventually revived in the Pentium M line of microprocessors. The successor to the Pentium M variant of the P6 microarchitecture is the Core microarchitecture which in turn is derived from the P6 microarchitecture. The P6 core was the sixth generation Intel microprocessor in the x86 line, the first implementation of the P6 core was the Pentium Pro CPU in 1995, the immediate successor to the original Pentium design. Some techniques first used in the x86 space in the P6 core include, Speculative execution and out-of-order completion and this lessened pipeline stalls, and in part enabled greater speed-scaling of the Pentium Pro and successive generations of CPUs. PAE and a wider 36-bit address bus to support 64 GB of physical memory, register renaming, which enabled more efficient execution of multiple instructions in the pipeline. CMOV instructions heavily used in compiler optimization, other new instructions, FCMOV, FCOMI/FCOMIP/FUCOMI/FUCOMIP, RDPMC, UD2. New instructions in Pentium II Deschutes core, FXSAVE, FXRSTOR, new instructions in Pentium III, SSE. The P6 line of processing cores was succeeded with the NetBurst architecture which appeared with the introduction of Pentium 4 and this was a completely different design based on the use of very long pipelines that favoured high clock speed at the cost of lower IPC, and higher power consumption. The Netburst-based processors were not as efficient per clock or per watt compared to their P6 predecessors. Mobile Pentium 4 processors ran much hotter than Pentium III-M processors and its inefficiency affected not only the cooling system complexity, but also the all-important battery life. Realizing their new microarchitecture wasnt the best choice for the mobile space, the result was a modernized P6 design called the Pentium M, Design Overview Quad-pumped Front Side Bus. With the initial Banias core, Intel adopted the 400 MT/s FSB first used in Pentium 4, the Dothan core moved to the 533 MT/s FSB, following Pentium 4s evolution. Initially 1 MB in the Banias core, then 2 MB in the Dothan core, Dynamic cache activation by quadrant selector from sleep states. SSE2 Streaming SIMD Extensions 2 support, a 12- or 14-stage instruction pipeline that allows for higher clock speeds. Addition of global history, indirect prediction, and loop prediction to branch prediction table, micro-ops Fusion of certain sub-instructions mediated by decoding units. X86 commands can result in fewer RISC micro-operations and thus require fewer processor cycles to complete, the Pentium M was the most power efficient x86 processor for notebooks for several years, consuming a maximum of 27 watts at maximum load and 4-5 watts while idle. The processing efficiency gains brought about by its modernization allowed it to rival the Mobile Pentium 4 clocked over 1 GHz higher and equipped with more memory
6.
Multi-core processor
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A multi-core processor is a single computing component with two or more independent actual processing units, which are units that read and execute program instructions. The instructions are ordinary CPU instructions, but the multiple cores can run multiple instructions at the same time, manufacturers typically integrate the cores onto a single integrated circuit die, or onto multiple dies in a single chip package. A multi-core processor implements multiprocessing in a physical package. Designers may couple cores in a multi-core device tightly or loosely, for example, cores may or may not share caches, and they may implement message passing or shared-memory inter-core communication methods. Common network topologies to interconnect cores include bus, ring, two-dimensional mesh, homogeneous multi-core systems include only identical cores, heterogeneous multi-core systems have cores that are not identical. Just as with single-processor systems, cores in multi-core systems may implement architectures such as VLIW, superscalar, Multi-core processors are widely used across many application domains, including general-purpose, embedded, network, digital signal processing, and graphics. The improvement in performance gained by the use of a multi-core processor depends very much on the algorithms used. In particular, possible gains are limited by the fraction of the software that can run in parallel simultaneously on multiple cores, most applications, however, are not accelerated so much unless programmers invest a prohibitive amount of effort in re-factoring the whole problem. The parallelization of software is a significant ongoing topic of research, the terms multi-core and dual-core most commonly refer to some sort of central processing unit, but are sometimes also applied to digital signal processors and system on a chip. This article uses the terms multi-core and dual-core for CPUs manufactured on the integrated circuit. In contrast to systems, the term multi-CPU refers to multiple physically separate processing-units. The terms many-core and massively multi-core are sometimes used to describe multi-core architectures with a high number of cores. Some systems use many soft microprocessor cores placed on a single FPGA, each core can be considered a semiconductor intellectual property core as well as a CPU core. While manufacturing technology improves, reducing the size of individual gates and these physical limitations can cause significant heat dissipation and data synchronization problems. Various other methods are used to improve CPU performance, some instruction-level parallelism methods such as superscalar pipelining are suitable for many applications, but are inefficient for others that contain difficult-to-predict code. Many applications are better suited to thread-level parallelism methods, and multiple independent CPUs are commonly used to increase a systems overall TLP, a combination of increased available space and the demand for increased TLP led to the development of multi-core CPUs. Several business motives drive the development of multi-core architectures, for decades, it was possible to improve performance of a CPU by shrinking the area of the integrated circuit, which reduced the cost per device on the IC. Alternatively, for the circuit area, more transistors could be used in the design
7.
Socket 479
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Socket 479 is the CPU socket for the Intel Pentium M and Celeron M, mobile processors. Normally used in laptops, but has also used with Tualatin-M Pentium III processors. The official naming by Intel is µFCPGA and µPGA479M, even the Intels CPU specifications seem to be not clear enough on the distinction and instead use the package/socket designations PGA478 or PPGA478 for more than 1 of the above sockets. Perhaps adding yet more confusion, some of the PGA-based CPUs above are available in a BGA package which has all of the 479 contacts populated. For these CPU variants, the Intels CPU specifications use the designations BGA479, PBGA479 or H-PBGA479 and it should be however pointed out that these designations denote rather the CPU package itself and not the socket, which the BGA variants do not use at all. The non-BGA counterparts of these CPUs use any one of the above mentioned sockets, Socket 479 has 479 pin holes. Pentium M processors in PGA package have 479 pins that plug into this zero insertion force socket, only 478 pins are electrically connected. Although electrically and mechanically similar, Socket 478 has one pin less, for this reason manufacturers like Asus have made drop-in boards which allow use of Socket 479 processors. Chipsets which employ this socket for the Pentium M are the Intel 855GM/GME/PM, while the Intel 855GME chipset supports all Pentium M CPUs, the Intel 855GM chipset does not officially support 90 nm 2MB L2 cache models. The other difference is the 855GM chipset graphics core runs at 200 MHz while the 855GME runs at 250 MHz. In 2006, Intel released the successor to Socket 479 with a revised pinout for its Core processor, List of Intel microprocessors List of Intel Pentium M microprocessors List of Intel Celeron microprocessors
8.
Pentium III
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The Pentium III brand refers to Intels 32-bit x86 desktop and mobile microprocessors based on the sixth-generation P6 microarchitecture introduced on February 26,1999. The brands initial processors were very similar to the earlier Pentium II-branded microprocessors, the most notable differences were the addition of the SSE instruction set, and the introduction of a controversial serial number embedded in the chip during the manufacturing process. Similarly to the Pentium II it superseded, the Pentium III was also accompanied by the Celeron brand for lower-end versions, and the Xeon for high-end derivatives. The Pentium III was eventually superseded by the Pentium 4, but its Tualatin core also served as the basis for the Pentium M CPUs, the first Pentium III variant was the Katmai. It was a development of the Deschutes Pentium II. The Pentium III saw an increase of 2 million transistors over the Pentium II and it was first released at speeds of 450 and 500 MHz in February 1999. Two more versions were released,550 MHz on May 17,1999 and 600 MHz on August 2,1999, on September 27,1999 Intel released the 533B and 600B running at 533 &600 MHz respectively. The B suffix indicated that it featured a 133 MHz FSB, the Katmai contains 9.5 million transistors, not including the 512 Kbytes L2 cache, and has dimensions of 12.3 mm by 10.4 mm. It is fabricated in Intels P856.5 process, a 0.25 micrometre CMOS process with five levels of aluminum interconnect, the Katmai used the same slot-based design as the Pentium II but with the newer SECC2 cartridge that allowed direct CPU core contact with the heat sink. There have been some early models of the Pentium III with 450 and 500 MHz packaged in an older SECC cartridge intended for OEMs, a notable stepping for enthusiasts was SL35D. This version of Katmai was officially rated for 450 MHz, but often contained cache chips for the 600 MHz model and thus usually was capable of running at 600 MHz. The second version, codenamed Coppermine, was released on October 25,1999, running at 500,533,550,600,650,667,700, and 733 MHz. From December 1999 to May 2000, Intel released Pentium IIIs running at speeds of 750,800,850,866,900,933 and 1000 MHz, both 100 MHz FSB and 133 MHz FSB models were made. An E was appended to the name to indicate cores using the new 0.18 μm fabrication process. An additional B was later appended to designate 133 MHz FSB models, however, AMD were able to clock the Athlon higher, reaching speeds of 1.2 GHz before the launch of the Pentium 4. The Coppermine core was unable to reach the 1.13 GHz speed without various tweaks to the processors microcode, effective cooling, additional voltage. Intel only officially supported the processor on its own VC820 i820-based motherboard, in benchmarks that were stable, performance was shown to be sub-par, with the 1.13 GHz CPU equalling a 1.0 GHz model. Toms Hardware attributed this performance deficit to relaxed tuning of the CPU, Intel needed at least six months to resolve the problems using a new cD0 stepping and re-released 1.1 GHz and 1.13 GHz versions in 2001
9.
X86
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X86 is a family of backward-compatible instruction set architectures based on the Intel 8086 CPU and its Intel 8088 variant. The term x86 came into being because the names of several successors to Intels 8086 processor end in 86, many additions and extensions have been added to the x86 instruction set over the years, almost consistently with full backward compatibility. The architecture has been implemented in processors from Intel, Cyrix, AMD, VIA and many companies, there are also open implementations. In the 1980s and early 1990s, when the 8088 and 80286 were still in common use, today, however, x86 usually implies a binary compatibility also with the 32-bit instruction set of the 80386. An 8086 system, including such as 8087 and 8089. There were also terms iRMX, iSBC, and iSBX – all together under the heading Microsystem 80, however, this naming scheme was quite temporary, lasting for a few years during the early 1980s. Today, x86 is ubiquitous in both stationary and portable computers, and is also used in midrange computers, workstations, servers. A large amount of software, including operating systems such as DOS, Windows, Linux, BSD, Solaris and macOS, functions with x86-based hardware. There have been attempts, including by Intel itself, to end the market dominance of the inelegant x86 architecture designed directly from the first simple 8-bit microprocessors. Examples of this are the iAPX432, the Intel 960, Intel 860, however, the continuous refinement of x86 microarchitectures, circuitry and semiconductor manufacturing would make it hard to replace x86 in many segments. The table below lists processor models and model series implementing variations of the x86 instruction set, each line item is characterized by significantly improved or commercially successful processor microarchitecture designs. Such x86 implementations are seldom simple copies but often employ different internal microarchitectures as well as different solutions at the electronic, quite naturally, early compatible microprocessors were 16-bit, while 32-bit designs were developed much later. For the personal computer market, real quantities started to appear around 1990 with i386 and i486 compatible processors, other companies, which designed or manufactured x86 or x87 processors, include ITT Corporation, National Semiconductor, ULSI System Technology, and Weitek. Some early versions of these microprocessors had heat dissipation problems, AMD later managed to establish itself as a serious contender with the K6 set of processors, which gave way to the very successful Athlon and Opteron. There were also other contenders, such as Centaur Technology, Rise Technology, VIA Technologies energy efficient C3 and C7 processors, which were designed by the Centaur company, have been sold for many years. Centaurs newest design, the VIA Nano, is their first processor with superscalar and it was, perhaps interestingly, introduced at about the same time as Intels first in-order processor since the P5 Pentium, the Intel Atom. The instruction set architecture has twice been extended to a word size. In 1999-2003, AMD extended this 32-bit architecture to 64 bits and referred to it as x86-64 in early documents, Intel soon adopted AMDs architectural extensions under the name IA-32e, later using the name EM64T and finally using Intel 64
10.
Microprocessor
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A microprocessor is a computer processor which incorporates the functions of a computers central processing unit on a single integrated circuit, or at most a few integrated circuits. Microprocessors contain both combinational logic and sequential digital logic, Microprocessors operate on numbers and symbols represented in the binary numeral system. The integration of a whole CPU onto a chip or on a few chips greatly reduced the cost of processing power. Integrated circuit processors are produced in numbers by highly automated processes resulting in a low per unit cost. Single-chip processors increase reliability as there are many electrical connections to fail. As microprocessor designs get better, the cost of manufacturing a chip generally stays the same, before microprocessors, small computers had been built using racks of circuit boards with many medium- and small-scale integrated circuits. Microprocessors combined this into one or a few large-scale ICs, the internal arrangement of a microprocessor varies depending on the age of the design and the intended purposes of the microprocessor. Advancing technology makes more complex and powerful chips feasible to manufacture, a minimal hypothetical microprocessor might only include an arithmetic logic unit and a control logic section. The ALU performs operations such as addition, subtraction, and operations such as AND or OR, each operation of the ALU sets one or more flags in a status register, which indicate the results of the last operation. The control logic retrieves instruction codes from memory and initiates the sequence of operations required for the ALU to carry out the instruction, a single operation code might affect many individual data paths, registers, and other elements of the processor. As integrated circuit technology advanced, it was feasible to manufacture more and more complex processors on a single chip, the size of data objects became larger, allowing more transistors on a chip allowed word sizes to increase from 4- and 8-bit words up to todays 64-bit words. Additional features were added to the architecture, more on-chip registers sped up programs. Floating-point arithmetic, for example, was not available on 8-bit microprocessors. Integration of the point unit first as a separate integrated circuit and then as part of the same microprocessor chip. Occasionally, physical limitations of integrated circuits made such practices as a bit slice approach necessary, instead of processing all of a long word on one integrated circuit, multiple circuits in parallel processed subsets of each data word. With the ability to put large numbers of transistors on one chip and this CPU cache has the advantage of faster access than off-chip memory, and increases the processing speed of the system for many applications. Processor clock frequency has increased more rapidly than external memory speed, except in the recent past, a microprocessor is a general purpose system. Several specialized processing devices have followed from the technology, A digital signal processor is specialized for signal processing, graphics processing units are processors designed primarily for realtime rendering of 3D images
11.
Intel
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Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California that was founded by Gordon Moore and Robert Noyce. It is the worlds largest and highest valued semiconductor chip makers based on revenue, and is the inventor of the x86 series of microprocessors, Intel supplies processors for computer system manufacturers such as Apple, Lenovo, HP, and Dell. Intel Corporation was founded on July 18,1968, by semiconductor pioneers Robert Noyce and Gordon Moore, the companys name was conceived as portmanteau of the words integrated and electronics. The fact that intel is the term for intelligence information made the name appropriate. Intel was a developer of SRAM and DRAM memory chips. Although Intel created the worlds first commercial microprocessor chip in 1971, during the 1990s, Intel invested heavily in new microprocessor designs fostering the rapid growth of the computer industry. The Open Source Technology Center at Intel hosts PowerTOP and LatencyTOP, and supports other projects such as Wayland, Intel Array Building Blocks, and Threading Building Blocks. Client Computing Group – 55% of 2016 revenues – produces hardware components used in desktop, data Center Group – 29% of 2016 revenues – produces hardware components used in server, network, and storage platforms. Internet of Things Group – 5% of 2016 revenues – offers platforms designed for retail, transportation, industrial, buildings, non-Volatile Memory Solutions Group – 4% of 2016 revenues – manufactures NAND flash memory products primarily used in solid-state drives. Intel Security Group – 4% of 2016 revenues – produces software, particularly security, programmable Solutions Group – 3% of 2016 revenues – manufactures programmable semiconductors. In 2016, Dell accounted for 15% of Intels total revenues, Lenovo accounted for 13% of total revenues, in the 1980s, Intel was among the top ten sellers of semiconductors in the world. In 1991, Intel became the biggest chip maker by revenue and has held the position ever since, other top semiconductor companies include TSMC, Advanced Micro Devices, Samsung, Texas Instruments, Toshiba and STMicroelectronics. Competitors in PC chip sets include Advanced Micro Devices, VIA Technologies, Silicon Integrated Systems, however, the cross-licensing agreement is canceled in the event of an AMD bankruptcy or takeover. Some smaller competitors such as VIA Technologies produce low-power x86 processors for small factor computers, however, the advent of such mobile computing devices, in particular, smartphones, has in recent years led to a decline in PC sales. Since over 95% of the worlds smartphones currently use processors designed by ARM Holdings, ARM is also planning to make inroads into the PC and server market. Intel has been involved in disputes regarding violation of antitrust laws. Intel was founded in Mountain View, California in 1968 by Gordon E. Moore, a chemist, and Robert Noyce, arthur Rock helped them find investors, while Max Palevsky was on the board from an early stage. Moore and Noyce had left Fairchild Semiconductor to found Intel, Rock was not an employee, but he was an investor and was chairman of the board
12.
Centrino
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Centrino is a brand name of Intel Corporation which represents its Wi-Fi and WiMAX wireless computer networking adapters. Previously the same name was used by the company as a platform-marketing initiative. The change of the meaning of the brandname occurred on January 7,2010, the old platform-marketing brand name covered a particular combination of mainboard chipset, mobile CPU and wireless network interface in the design of a laptop. Intel claimed that systems equipped with these technologies delivered better performance, longer battery life, the new product line name for Intel wireless products is Intel Centrino Wireless. Intel used Carmel as the codename for the first-generation Centrino platform, Intel responded that the IEEE had not finalized the 802. 11g standard at the time of Carmels launch, and that it only wanted to launch products based on a finalized standard. In early 2004, after the finalization of the 802. 11g standard, at the same time, they permitted the new Dothan Pentium M to substitute for the Banias Pentium M. Initially, Intel permitted only the 855GM chipset, which did not support external graphics. Later, Intel allowed the 855GME and 855PM chips, which did support external graphics, despite criticisms, the Carmel platform won quick acceptance among OEMs and consumers. Carmel could attain or exceed the performance of older Pentium 4-M platforms, Carmel also allowed laptop manufacturers to create thinner and lighter laptops because its components did not dissipate much heat, and thus did not require large cooling systems. Intel used Sonoma as the codename for the second-generation Centrino platform, introduced in January 2005. The Mobile 915 Express chipset, like its desktop version, supports many new features such as DDR2, PCI Express, Intel High Definition Audio, the codename Napa designates the third-generation Centrino platform, introduced in January 2006 at the Winter Consumer Electronics Show. The platform initially supported Intel Core Duo processors but the newer Core 2 Duo processors were launched and supported in this platform from July 27,2006 onwards. Intel uses Centrino Duo branding for laptops with dual-core Core Duo processors, some of the initial Core Duo laptops are still labeled as Intel Centrino rather than Centrino Duo. The codename Santa Rosa refers to the fourth-generation Centrino platform, which was released on Thursday May 10,2007, the Santa Rosa platform comes with dynamic acceleration technology, allowing single threaded applications to execute faster. When a single threaded application is running, the CPU can turn off one of its cores, in this way the CPU maintains the same Thermal Profile as it would when both cores are active. Santa Rosa performs well as a gaming platform due to its ability to switch between single threaded and multithreaded tasks. Other power savings come from an Enhanced Sleep state where both the CPU cores and the chipset will power down, the wireless chipset update was originally intended to include WWAN Internet access via HSDPA, co-developed with Nokia. After announcing a partnership, both later retracted the deal citing the lack of a clear business case for the technology. Support for WiMAX was originally scheduled for inclusion in Santa Rosa but was delayed until Montevina in 2008
13.
Branch predictor
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In computer architecture, a branch predictor is a digital circuit that tries to guess which way a branch will go before this is known for sure. The purpose of the predictor is to improve the flow in the instruction pipeline. Branch predictors play a role in achieving high effective performance in many modern pipelined microprocessor architectures such as x86. Two-way branching is usually implemented with a jump instruction. Without branch prediction, the processor would have to wait until the conditional jump instruction has passed the stage before the next instruction can enter the fetch stage in the pipeline. The branch predictor attempts to avoid waste of time by trying to guess whether the conditional jump is most likely to be taken or not taken. The branch that is guessed to be the most likely is then fetched, the time that is wasted in case of a branch misprediction is equal to the number of stages in the pipeline from the fetch stage to the execute stage. Modern microprocessors tend to have quite long pipelines so that the delay is between 10 and 20 clock cycles. As a result, making a pipeline longer increases the need for a more advanced branch predictor, the first time a conditional jump instruction is encountered, there is not much information to base a prediction on. But the branch predictor keeps records of whether branches are taken or not taken, when it encounters a conditional jump that has been seen several times before then it can base the prediction on the history. The branch predictor may, for example, recognize that the jump is taken more often than not. Branch prediction is not the same as branch target prediction, Branch prediction attempts to guess whether a conditional jump will be taken or not. Branch target prediction attempts to guess the target of a conditional or unconditional jump before it is computed by decoding and executing the instruction itself. Branch prediction and branch target prediction are often combined into the same circuitry, static prediction is the simplest branch prediction technique because it does not rely on information about the dynamic history of code executing. Instead it predicts the outcome of a branch based solely on the branch instruction, only when the branch or jump is evaluated and found to be taken, does the instruction pointer get set to a non-sequential address. Both CPUs evaluate branches in the stage and have a single cycle instruction fetch. As a result, the branch target recurrence is two long, and the machine always fetches the instruction immediately after any taken branch. Both architectures define branch delay slots in order to utilize these fetched instructions, a more advanced form of static prediction presumes that backward branches will be taken and that forward branches will not
14.
Pentium 4
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Pentium 4 was a line of single-core central processing units for desktops, laptops and entry-level servers introduced by Intel on November 20,2000 and shipped through August 8,2008. They had a seventh-generation x86 microarchitecture, called NetBurst, which was the companys first all-new design since the introduction of the P6 microarchitecture of the Pentium Pro CPUs in 1995, NetBurst differed from P6 by featuring a very deep instruction pipeline to achieve very high clock speeds. Intel claimed that NetBurst would allow speeds of up to 10 GHz in future chips, however. In 2004, the initial 32-bit x86 instruction set of the Pentium 4 microprocessors was extended by the 64-bit x86-64 set, the first Pentium 4 cores, codenamed Willamette, were clocked from 1.3 GHz to 2 GHz. They were released on November 20,2000, using the Socket 423 system, notable with the introduction of the Pentium 4 was the 400 MT/s FSB. It actually operated at 100 MHz, but the FSB was quad-pumped, meaning that the transfer rate was four times the base clock of the bus. The AMD Athlons double-pumped FSB was running at 100 or 133 MHz at that time, Pentium 4 CPUs introduced the SSE2 and, in the Prescott-based Pentium 4s, SSE3 instruction sets to accelerate calculations, transactions, media processing, 3D graphics, and games. Later versions featured Hyper-Threading Technology, a feature to one physical CPU work as two logical CPUs. Intel also marketed a version of their low-end Celeron processors based on the NetBurst microarchitecture, in 2005, the Pentium 4 was complemented by the Pentium D and Pentium Extreme Edition dual-core CPUs. In benchmark evaluations, the advantages of the NetBurst microarchitecture were unclear, with carefully optimized application code, the first Pentium 4s outperformed Intels fastest Pentium III, as expected. But in legacy applications with many branching or x87 floating-point instructions and its main handicap was a shared unidirectional bus. Furthermore, the NetBurst microarchitecture consumed more power and emitted more heat than any previous Intel or AMD microarchitectures, as a result, the Pentium 4s introduction was met with mixed reviews, Developers disliked the Pentium 4, as it posed a new set of code optimization rules. For example, in applications, AMDs lower-clocked Athlon easily outperformed the Pentium 4. Tom Yager of Infoworld magazine called it the fastest CPU - for programs that fit entirely in cache, computer-savvy buyers avoided Pentium 4 PCs due to their price premium, questionable benefit, and initial restriction to Rambus RAM. In terms of marketing, the Pentium 4s singular emphasis on clock frequency made it a marketers dream. The result of this was that the NetBurst microarchitecture was often referred to as a marchitecture by various computing websites and it was also called NetBust, a term popular with reviewers who reflected negatively upon the processors performance. The two classical metrics of CPU performance are IPC and clock speed, while IPC is difficult to quantify due to dependence on the benchmark applications instruction mix, clock speed is a simple measurement yielding a single absolute number. Unsophisticated buyers would simply consider the processor with the highest clock speed to be the best product, because AMDs processors had slower clock speeds, it countered Intels marketing advantage with the megahertz myth campaign
15.
Pentium II
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The Pentium II brand refers to Intels sixth-generation microarchitecture and x86-compatible microprocessors introduced on May 7,1997. Containing 7.5 million transistors, the Pentium II featured a version of the first P6-generation core of the Pentium Pro. However, its L2 cache subsystem was a downgrade when compared to Pentium Pros, in early 1999, the Pentium II was superseded by the almost identical Pentium III, which basically only added SSE instructions to the CPU. The Celeron was characterized by a reduced or omitted on-die full-speed L2 cache, the Xeon was characterized by a range of full-speed L2 cache, a 100 MT/s FSB, a different physical interface, and support for symmetric multiprocessing. The Pentium II microprocessor was largely based upon the microarchitecture of its predecessor, the Pentium Pro, unlike previous Pentium and Pentium Pro processors, the Pentium II CPU was packaged in a slot-based module rather than a CPU socket. The processor and associated components were carried on a similar to a typical expansion board within a plastic cartridge. A fixed or removable heatsink was carried on one side, sometimes using its own fan and this larger package was a compromise allowing Intel to separate the secondary cache from the processor while still keeping it on a closely coupled back-side bus. The L2 cache ran at half the processors clock frequency, unlike the Pentium Pro, however, the smallest cache size was increased to 512 KB from the 256 KB on the Pentium Pro. Off-package cache solved the Pentium Pros low yields, allowing Intel to introduce the Pentium II at a price level. Intel improved 16-bit code execution performance on the Pentium II, an area in which the Pentium Pro was at a notable handicap, most consumer software of the day was still using at least some 16-bit code, because of a variety of factors. The Pentium II featured 32 KB of L1 cache, double that of the Pentium Pro, the Pentium II was also the first P6-based CPU to implement the Intel MMX integer SIMD instruction set which had already been introduced on the Pentium MMX. The Pentium II was basically a more consumer-oriented version of the Pentium Pro and it was cheaper to manufacture because of the separate, slower L2 cache memory. The improved 16-bit performance and MMX support made it a choice for consumer-level operating systems, such as Windows 9x. Combined with the larger L1 cache and improved 16-bit performance, the slower and cheaper L2 caches performance impact was reduced, general processor performance was increased while costs were cut. While this limit was practically irrelevant for the home user at the time. Presumably, Intel put this limitation deliberately in place to distinguish the Pentium II from the higher end Pentium Pro line. The 82459AD revision of the chip on some 333 MHz and all 350 MHz and faster Pentium IIs lifted this restriction, the original Klamath Pentium II microprocessor ran at 233,266, and 300 MHz and were produced in a 0.35 µm process. The 300 MHz version, however, only available in quantities later in 1997
16.
Pentium Pro
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The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1,1995. It introduced the P6 microarchitecture and was intended to replace the original Pentium in a full range of applications. While the Pentium and Pentium MMX had 3.1 and 4.5 million transistors, respectively, the Pentium Pro contained 5.5 million transistors. Later, it was reduced to a narrow role as a server and high-end desktop processor and was used in supercomputers like ASCI Red. The Pentium Pro was capable of both dual- and quad-processor configurations and it only came in one form factor, the relatively large rectangular Socket 8. The Pentium Pro was succeeded by the Pentium II Xeon in 1998, the lead architect of Pentium Pro was Fred Pollack who was specialized in superscalarity and had also worked as the lead engineer of Intel iAPX432. The Pentium Pro incorporated a new microarchitecture in a departure from the Pentium x86 architecture and it has a decoupled, 14-stage superpipelined architecture which used an instruction pool. The Pentium Pro featured many advanced concepts not found in the Pentium, the Pentium Pro thus featured out of order execution, including speculative execution via register renaming. It also had a wider 36-bit address bus, allowing it to access up to 64GB of memory, the Pentium Pro has an 8 KiB instruction cache, from which up to 16 bytes are fetched on each cycle and sent to the instruction decoders. The decoders are not equal in capability, only one can decode any x86 instruction and this restricts the Pentium Pros ability to decode multiple instructions simultaneously, limiting superscalar execution. X86 instructions are decoded into 118-bit micro-operations, the micro-ops are RISC-like, that is, they encode an operation, two sources, and a destination. The general decoder can generate up to four micro-ops per cycle, thus, x86 instructions that operate on the memory can only be processed by the general decoder, as this operation requires a minimum of three micro-ops. Likewise, the simple decoders are limited to instructions that can be translated into one micro-op, instructions that require more micro-ops than four are translated with the assistance of a sequencer, which generates the required micro-ops over multiple clock cycles. Micro-ops exit the re-order buffer and enter a station, where they await dispatch to the execution units. In each clock cycle, up to five micro-ops can be dispatched to five execution units, the Pentium Pro has a total of six execution units, two integer units, one floating-point unit, a load unit, store address unit, and a store data unit. Of the two units, only one has the full complement of functions such as a barrel shifter, multiplier and divider. The second integer unit, which shares paths with the FPU, does not have facilities and is limited to simple operations such as add, subtract. Addition and multiplication are pipelined and have a latency of three and five cycles, respectively, division and square-root are not pipelined and are executed in separate units that share the FPUs ports
17.
AOpen
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AOpen is a major electronics manufacturer from Taiwan that makes computers and parts for computers. AOpen used to be the Open System Business Unit of Acer Computer Inc. which designed, manufactured and it was incorporated in December 1996 as a subsidiary of Acer Group with an initial public offering at the Taiwan stock exchange in August 2002. It is also the first subsidiary which established the paradigm in the pan-Acer Group. Currently, AOpen is a subsidiary of Wistron Group, a spin-off of the Acer Group and they are perhaps most well known for their Mobile on Desktop solutions, which implements Intels Pentium M platform on desktop motherboards. AOPens founders built a company around the idea of open & share, the ampersand represents one of the images of the entire corporate identity. AOPen specializes in small form factor platform applications, and product development. Since 2005 AOpen has been developing energy-saving products, according to different types of customers, applications and contexts, AOpen splits its product platforms into two major categories, digital signage platform and SFF platform. There are six parts in AOpens digital signage platform applications, media player, management, deployment, display, extension. AOPEN develops SFF platform products to fulfill end users’ needs, such as HTPC and gaming PC in digital homes, in addition, AOPEN develops SFF business PC for business applications, such as kiosk and POS. AOPEN also supplies a variety of I/O components, including case, motherboard, keyboard. List of companies of Taiwan Official website
18.
DFI
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DFI was first established in 1981 by Y. C Lu. At that time, DFI began as a card maker with a turnover of 100 cards. In 1992, DFI abandoned its graphics card production and switched to the production of motherboards as the graphics card market was too limited at the time, after 5 years, DFI quickly gained a reputation in the Asia-Pacific region. It peaked as high as one of the top 15 motherboard manufacturers at that time, in 1998, DFI became the sole design partner for the Intel 810 series chipset, which gained more attention. In 2003, DFI internally reorganised its line into 3 distinct groups, one was the standard OEM line, another is the Infinity budget range, and the last as the LANParty range. The head of the LANParty range was Oskar Wu, who joined DFI after he resigned from ABIT after the NForce series. Currently, as of 2006, DFI had left being one of the most competitive manufacture as it used to be in 90s and they now specialized in some industrial computing and legacy parts for old computers. Actually, DFI, stands for Diamond Flower International, Diamond Flower being the name of David and YC Lus mother, translated from mandarin. DFI is located in Hsi-Chih City, Taiwan with regional offices in the United States, Europe, China, DFI caters to the enthusiast market with motherboards with advanced overclocking features and a design with ultraviolet-reactive connectors on a black PCB. There are two versions of the LANParty line with the UT similar to the full LANParty gear except for the omission of the PC Transpo bag, UV sleeving kit, FrontX Panel, and less UV-reactant cables. DFI introduced their Junior lineup in the mid summer of 2008 with two products, p45 and 790gx, but have somewhat been extended with a nvidia chipset, the junior lineup JR is micro-ATX and they usually support Crossfire or SLI setups with dual-slot videocards. This series has proven to be a segment in the future for small. However, they dont contain the power circuitry and BIOS options as their full-sized ATX counterparts. There are other LanParty series like LT and DK, lanparty UT is still the most high end line of products and few chipsets are reserved under the name. This line is the Infinity/Bloodiron, which started with the nForce 2, the Bloodiron is just the Infinity series renamed. This product line is the General line, for those wanting to build silent computers, there is a product line called Silent PC. DFI is also manufacturing motherboards for various industrial purposes, dFI-ACP is a Wintel based platform provider for non-PC business, products range from board level, open frame, add-on boards to barebone systems. List of companies of Taiwan ASRock Asus Biostar Elitegroup Computer Systems EVGA Corporation Gigabyte Technology Micro-Star International DFI website DFI itox website
19.
Micro-Star International
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MSI is a Taiwanese multinational information technology corporation headquartered in New Taipei City, Taiwan. The company has a listing on the Taiwan Stock Exchange and was established in August 1986 by 5 founders – Hsu Xiang, Huang Jinqing, Lin Wentong, Yu Xianneng. It also provides global warranty service in North America, Central/South America, Asia, Australia, the company has been a sponsor for a number of eSports teams and is also the host of the international gaming event MSI Masters Gaming Arena. The earliest Beat IT tournament can be traced back to 2010, the company first built its reputation on developing and manufacturing computer motherboards and graphics cards. It established its subsidiary FUNTORO in 2008 to provide solutions for vehicle infotainment, when established in 1986, MSI focused on the design and manufacturing of motherboards and add-on cards. Later that year, it introduced the first overclockable 286 motherboard, in 1989, MSI introduced its first 486 motherboard, in 1993, its first 586 motherboard, in 1995, its Dual Pentium Pro-based motherboard. In 2000 MSI introduced its first set-top box product, in 2003, its first Pen Tablet PC product, and in 2004, its first Notebook product. In 2009, MSI introduced its first Ultra Slim Notebook, in early 2016, MSI announced collaboration with HTC and has revealed Vive-ready systems to offer Virtual Reality experience. In 1997, MSI inaugurated its Plant I in Jung-He city, in 2000, it inaugurated its Plant III in Jung-He city In 1998, in 2000, MSI Computer Co. Ltd. was founded, and in 2001, MSI Electronics Co. Ltd. In 2008, MSI was ranked among the Top 20 Taiwan Global Brands, in 2011, the firm was named one of the Top 100 Taiwan Brands, distinguished among 500 brands. By 2013, MSI has been awarded from Taiwan Excellence for 15 consecutive years, in 2015, MSI was ranked the 4th best laptop brand of 2015 by Laptop magazine. MSIs offices in Zhonghe District, New Taipei City, Taiwan serve as the companys headquarters, manufacturing initially took place at plants in Taiwan. The company has offices in the Americas, Europe, Asia, Australia. As of 2015 the company has employed a workforce of over 13,500 and has a global presence in over 120 countries, spanning the Americas, Europe/Middle East/Africa. List of companies of Taiwan Official website
20.
Home theater PC
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In recent years, other types of consumer electronics, including gaming systems and dedicated media devices have crossed over to manage video and music content. The term media center also refers to specialized application software designed to run on personal computers. An HTPC and other convergence devices integrate components of a theater into a unit co-located with a home entertainment system. An HTPC system typically has a control and the software interface normally has a 10-foot user interface design so that it can be comfortably viewed at typical television viewing distances. An HTPC can be purchased pre-configured with the hardware and software needed to add video programming or music to the PC. Enthusiasts can also piece together a system out of components as part of a software-based HTPC. The increased availability of specialized devices, coupled with paid and free online content. Integrating televisions and personal computers dates back to the late 1980s with tuner cards that could be added to Commodore Amiga PCs via the Video Toaster and this adaptation would allow a small video window to appear on the screen with broadcast or cable content. Apple Computer also developed the Macintosh TV in late 1993 that included a tuner card built into an Macintosh LC520 chassis, in 1996 Gateway Computer unveiled the Destination computer that included a tuner card and video card. The unit cost $4,000 and mostly integrated television viewing, the Destination was called a PC-TV Combo but by December the term Home-theater PC appeared in mainstream media, The home theater PC will be a combination entertainment and information appliance. By 2000, DVD players had become ubiquitous and consumers were seeking ways to improve the picture. The value of using a computer instead of stand alone DVD player drove more usage of the PC as a media device. In particular, the desire for progressive scanning DVD players with better fidelity led some consumers to consider their computers instead of very expensive DVD players. As DVD players dropped in price, so did PCs and their video processing. In 2000, DVD decryption software using the DeCSS algorithm let DVD owners consolidate their DVD video libraries on hard-drives, innovations like TiVo and ReplayTV allowed viewers to store and timeshift broadcast content using specialty designed computers. ReplayTV for instance ran on a VxWorks platform, incorporating these capabilities into PCs was well within the ability of a computer hobbyist who was willing to build and program these systems. Key benefits of these DIY projects included lower cost and more features, advancements in hardware identified another weak link, the absence of media management software to make it easy to display and control the video from a distance. By 2002, major software developments also facilitated media management, hardware integration, MythTV provided a free and open source solution using Linux
21.
Asus
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AsusTek Computer Inc. is a Taiwanese multinational computer hardware and electronics company headquartered in Beitou District, Taipei, Taiwan. The company is also an original equipment manufacturer, Asus is the worlds 4th-largest PC vendor by 2015 unit sales.3 billion. Asus has a listing on the Taiwan Stock Exchange under the ticker code 2357. The company is referred to as Asus or Huáshuò in Chinese. According to the website, the name Asus originates from Pegasus. Only the last four letters of the word were used in order to give the name a high position in alphabetical listings, the companys slogan/tagline was Rock Solid. Persistent Perfection. and is currently In Search of Incredible, persistent Perfection In Search of Incredible Asus was founded in Taipei in 1989 by T. H. Tung, Ted Hsu, Wayne Hsieh and M. T, liao, all four having previously worked at Acer as hardware engineers. At this time, Taiwan had yet to establish a position in the computer-hardware business. According to the legend, the created a prototype for a motherboard using an Intel 486. When Asus approached Intel to request a processor to test it, Asus solved Intels problem and it turned out that Asus own motherboard worked correctly without the need for further modification. Since then, Asus was receiving Intel engineering samples ahead of its competitors, in September 2005 Asus released the first PhysX accelerator card. In December 2005 Asus entered the LCD TV market with the TLW32001 model, in January 2006 ASUS announced that it would cooperate with Lamborghini to develop the VX series. On 9 March 2006 Asus was confirmed as one of the manufacturers of the first Microsoft Origami models, together with Samsung, on 8 August 2006 Asus announced a joint venture with Gigabyte Technology. On 5 June 2007 Asus announced the launch of the Eee PC at COMPUTEX Taipei, on 9 September 2007 Asus indicated support for Blu-ray, announcing the release of a BD-ROM/DVD writer PC drive, BC-1205PT. ASUS subsequently released several Blu-ray based notebooks, in January 2008, Asus began a major restructuring of its operations, splitting into three independent companies, Asus, Pegatron, and Unihan Corporation. In the process of the restructuring, a highly criticized pension-plan restructuring effectively zeroed out the existing pension balances, the company paid out all contributions previously made by employees. On 9 December 2008, the Open Handset Alliance announced that Asus had become one of 14 new members of the organization, on 1 June 2010, Asus spun off Pegatron Corp
22.
Socket 478
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Socket 478 is a 478-contact CPU socket used for Intels Pentium 4 and Celeron series CPUs. Socket 478 was launched with the Northwood core to compete with AMDs 462-pin Socket A, Socket 478 was intended to be the replacement for Socket 423, a Willamette-based processor socket which was on the market for only a short time. Socket 478 was phased out with the launch of LGA775, Socket 478 was used for all Northwood Pentium 4 and Celeron processors. It supported the first Prescott Pentium 4 processors and all Willamette Celerons, Socket 478 also supported the newer Prescott-based Celeron D processors, and early Pentium 4 Extreme Edition processors with 2 MiB of L3 CPU cache. Celeron D processors were available for Socket 478 and were the last CPUs made for the socket. All socket have the following mechanical maximum load limits which should not be exceeded during heatsink assembly, shipping conditions, load above those limits will crack the processor die and make it unusable. List of Intel microprocessors Socket information
23.
Shuttle Inc.
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Shuttle Inc. is a Taiwan-based manufacturer of motherboards, barebone computers, complete PC systems and monitors. Shuttle XPC desktop systems are based on same PC platform as the XPC barebone Shuttle manufactures, more recently, the differentiation between Shuttle barebones and Shuttle systems has become greater, with the launch of system exclusive models such as the M-series and X-series. 1983 - Shuttle was initially incorporated in Taiwan by David and Simon Yu under the name Holco,1984 - Holco begins manufacturing motherboards in its Taoyuan County, Taiwan factory. 1988 - Holco establishes its first overseas office, in Fremont. 1990 - Holco subsidiary Shuttle Computer Handel is established in Elmshorn,1994 - Introduces Shuttle RiscPC4475, a desktop based on DEC Alpha 64-bit microprocessor and Microsoft Windows NT for Alpha. 1995 - Shuttle reaches #5 motherboard manufacturer worldwide in terms of volume,1997 - Holco officially changes its name to Shuttle Inc.2000 - Goes public on TAIEX stock market under symbol 2405. 2001 - Introduces Shuttle SV24, a compact all-aluminum computer using desktop components,2002 - SV24 evolves into XPC line of small form factor barebones computers, including models for Intels Pentium 4 and AMDs Athlon. Branch offices established in Japan and China,2005 - PC World awards Shuttle the World Class and Best Buy awards. 2005 - IDC research ranks the Shuttle brand loyalty higher than Dell, Sony,2005 - Shuttle introduces the worlds first small-form-factor Nvidia SLi system. 2005 - Introduction of Shuttles first exclusive set-top box living-room PC,2005 - Shuttle debuts the world’s fastest ultra-small-form-factor PC - the X100. 2006 - Shuttle is selected as one of Intels premiere partners when Intel Viiv launched at the International Consumer Electronics Show in Las Vegas,2006 - Shuttle launches a series of new chassis, X series and T series, which offers variety shapes of PC. 2006 - PCWORLD selects the Shuttle as the 15th great landmark in PC history,2007 - Shuttle introduces new lineup of extreme gaming PC, SDXi system. Features Intel Core 2 Extreme processor and water cooling system,2007 - Shuttle Computers introduces the first SFF Workstation line with Intel Xeon Processors. 2007 - Shuttle introduces XPC G5 3300m System, features the worlds first,2007 - Shuttle introduces XPC Glamor, Prima and DVO series. 2007 - BCN awards Shuttle the Top Prize in the Barebone PC category, most prestigious Japanese award for IT companies. 2008 - Shuttle implements Green features into PC lineup,2008 - Shuttle debuts its first Surveillance concept product. 2009 - Shuttle launches X50, its first All-In-One PC,2009 - Shuttle develops its first Home Automation product. 2009 - Shuttle develops its first IPC product,2010 - Shuttle establishes OEM business unit to launch mobile solutions
24.
Embedded system
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An embedded system is a computer system with a dedicated function within a larger mechanical or electrical system, often with real-time computing constraints. It is embedded as part of a device often including hardware. Embedded systems control many devices in use today. Ninety-eight percent of all microprocessors are manufactured as components of embedded systems, examples of properties of typically embedded computers when compared with general-purpose counterparts are low power consumption, small size, rugged operating ranges, and low per-unit cost. This comes at the price of limited processing resources, which make them more difficult to program. For example, intelligent techniques can be designed to power consumption of embedded systems. Modern embedded systems are based on microcontrollers, but ordinary microprocessors are also common. In either case, the processor used may be ranging from general purpose to those specialised in certain class of computations. A common standard class of dedicated processors is the signal processor. Since the embedded system is dedicated to tasks, design engineers can optimize it to reduce the size and cost of the product and increase the reliability. Some embedded systems are mass-produced, benefiting from economies of scale, complexity varies from low, with a single microcontroller chip, to very high with multiple units, peripherals and networks mounted inside a large chassis or enclosure. One of the very first recognizably modern embedded systems was the Apollo Guidance Computer, an early mass-produced embedded system was the Autonetics D-17 guidance computer for the Minuteman missile, released in 1961. When the Minuteman II went into production in 1966, the D-17 was replaced with a new computer that was the first high-volume use of integrated circuits. Since these early applications in the 1960s, embedded systems have come down in price and there has been a rise in processing power. An early microprocessor for example, the Intel 4004, was designed for calculators and other systems but still required external memory. By the early 1980s, memory, input and output system components had been integrated into the chip as the processor forming a microcontroller. Microcontrollers find applications where a computer would be too costly. A comparatively low-cost microcontroller may be programmed to fulfill the role as a large number of separate components
25.
Israel
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Israel, officially the State of Israel, is a country in the Middle East, on the southeastern shore of the Mediterranean Sea and the northern shore of the Red Sea. The country contains geographically diverse features within its small area. Israels economy and technology center is Tel Aviv, while its seat of government and proclaimed capital is Jerusalem, in 1947, the United Nations adopted a Partition Plan for Mandatory Palestine recommending the creation of independent Arab and Jewish states and an internationalized Jerusalem. The plan was accepted by the Jewish Agency for Palestine, next year, the Jewish Agency declared the establishment of a Jewish state in Eretz Israel, to be known as the State of Israel. Israel has since fought several wars with neighboring Arab states, in the course of which it has occupied territories including the West Bank, Golan Heights and it extended its laws to the Golan Heights and East Jerusalem, but not the West Bank. Israels occupation of the Palestinian territories is the worlds longest military occupation in modern times, efforts to resolve the Israeli–Palestinian conflict have not resulted in peace. However, peace treaties between Israel and both Egypt and Jordan have successfully been signed, the population of Israel, as defined by the Israel Central Bureau of Statistics, was estimated in 2017 to be 8,671,100 people. It is the worlds only Jewish-majority state, with 74. 8% being designated as Jewish, the countrys second largest group of citizens are Arabs, at 20. 8%. The great majority of Israeli Arabs are Sunni Muslims, including significant numbers of semi-settled Negev Bedouins, other minorities include Arameans, Armenians, Assyrians, Black Hebrew Israelites, Circassians, Maronites and Samaritans. Israel also hosts a significant population of foreign workers and asylum seekers from Africa and Asia, including illegal migrants from Sudan, Eritrea. In its Basic Laws, Israel defines itself as a Jewish, Israel is a representative democracy with a parliamentary system, proportional representation and universal suffrage. The prime minister is head of government and the Knesset is the legislature, Israel is a developed country and an OECD member, with the 35th-largest economy in the world by nominal gross domestic product as of 2016. The country benefits from a skilled workforce and is among the most educated countries in the world with one of the highest percentage of its citizens holding a tertiary education degree. The country has the highest standard of living in the Middle East and the third highest in Asia, in the early weeks of independence, the government chose the term Israeli to denote a citizen of Israel, with the formal announcement made by Minister of Foreign Affairs Moshe Sharett. The names Land of Israel and Children of Israel have historically used to refer to the biblical Kingdom of Israel. The name Israel in these phrases refers to the patriarch Jacob who, jacobs twelve sons became the ancestors of the Israelites, also known as the Twelve Tribes of Israel or Children of Israel. The earliest known artifact to mention the word Israel as a collective is the Merneptah Stele of ancient Egypt. The area is known as the Holy Land, being holy for all Abrahamic religions including Judaism, Christianity, Islam
26.
Banias
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Banias is the Arabic and modern Hebrew name of an ancient site that developed around a spring once associated with the Greek god Pan. It is located at the foot of Mount Hermon, north of the Golan Heights, the spring is the source of the Banias River, one of the main tributaries of the Jordan River. The first mention of the ancient city during the Hellenistic period was in the context of the Battle of Panium, fought around 200-198 BCE, later the region was called Paneas. Both names were derived from that of Pan, the god of the wild, the spring at Banias initially originated in a large cave carved out of a sheer cliff face which was gradually lined with a series of shrines. The temenos included in its final phase a temple placed at the mouth of the cave, courtyards for rituals and it was constructed on an elevated, 80m long natural terrace along the cliff which towered over the north of the city. A four-line inscription at the base of one of the niches relates to Pan and Echo, the mountain nymph, and was dated to 87 BCE. The once very large spring gushed from the cave, but an earthquake moved it to the foot of the natural terrace where it now seeps quietly from the bedrock. From here the stream, called Nahal Hermon in Hebrew, flows towards what once were the malaria-infested Hula marshes, the pre-Hellenistic deity associated with the spring of Banias was variously called Baal-gad or Baal-hermon. Paneas was first settled in the Hellenistic period following Alexander the Greats conquest of the east, the Ptolemaic kings built a cult centre there in the 3rd century BC. In the Hellenistic Period the spring was named Panias, for the Arcadian goat-footed god Pan, the Latin equivalent for Paneas is Fanium. The spring lies close to the way of the sea mentioned by Isaiah, in extant sections of the Greek historian Polybiuss history of The Rise of the Roman Empire, a Battle of Panium is mentioned. This battle was fought in ca, 200-198 BC between the armies of Ptolemaic Egypt and the Seleucids of Coele-Syria, led by Antiochus III. Antiochuss victory cemented Seleucid control over Phoenicia, Galilee, Samaria and it was these Seleucids who built a pagan temple dedicated to Pan at Paneas. Upon Zenodoruss death in 20 BC, the Panion, including Paneas, was annexed to the Kingdom of Herod the Great, Herod erected a temple of white marble there n honour of his patron. In 61 CE, king Agrippa II renamed the administrative capital Neronias in honour of the Roman emperor Nero, Agrippa also carried out urban improvements. In 67CE, during the First Jewish–Roman War, Vespasian briefly visited Caesarea Philippi before advancing on Tiberias in Galilee, with the death of Agrippa II around the year 92 came the end of Herodian rule, and the city returned to the province of Syria. In the late Roman and Byzantine periods the written sources name the city again as Paneas, in 361, Emperor Julian the Apostate instigated a religious reformation of the Roman state, in which he supported the restoration of Hellenic paganism as the state religion. In Paneas this was achieved by replacing Christian symbols, though the change was short lived, in the 5th century, following the division of the Empire, the city was part of the Eastern Empire, but was lost to the Arab expansion of the 7th century
27.
Golan Heights
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The Golan Heights, or simply the Golan or the Syrian Golan, is a region in the Levant. As a geopolitical region, the Golan Heights is the area captured from Syria and occupied by Israel during the Six-Day War and this region includes the western two-thirds of the geological Golan Heights, as well as the Israeli-occupied part of Mount Hermon. The earliest evidence of habitation dates to the Upper Paleolithic period. According to the Bible, an Amorite Kingdom in Bashan was conquered by Israelites during the reign of King Og, throughout the Old Testament period, the Golan was the focus of a power struggle between the Kings of Israel and the Aramaeans who were based near modern-day Damascus. The Itureans, an Arab or Aramaic people, settled there in the 2nd century BCE, organized Jewish settlement in the region came to an end in 636 CE when it was conquered by Arabs under Umar ibn al-Khattāb. In the 16th century, the Golan was conquered by the Ottoman Empire and was part of the Vilayet of Damascus until it was transferred to French control in 1918, when the mandate terminated in 1946, it became part of the newly independent Syrian Arab Republic. Internationally recognized as Syrian territory, the Golan Heights has been occupied and administered by Israel since 1967 and it was captured during the 1967 Six-Day War, establishing the Purple Line. On 19 June 1967, the Israeli cabinet voted to return the Golan to Syria in exchange for a peace agreement, although this was rejected after the Khartoum Resolution of 1 September 1967. In the aftermath of the 1973 Yom Kippur War, in which Syria tried but failed to recapture the Golan and this part was incorporated into a demilitarised zone that runs along the ceasefire line and extends eastward. This strip is under the control of UNDOF. Israel states it has a right to retain the Golan, citing the text of UN Resolution 242, however, the international community reject Israeli claims to title to the territory and regards it as sovereign Syrian territory. Historically, Israeli Prime Ministers Yitzhak Rabin, Ehud Barak, later, in 2010, Israeli foreign minister Avigdor Lieberman told Syria to abandon its dreams of recovering the Golan Heights. Approximately 10% of Syrian Golan Druze have accepted Israeli citizenship, according to the CIA World Factbook, as of 2010, there are 41 Israeli settlements and civilian land use sites in the Israeli-occupied Golan Heights. Arabic names are Jawlān and Djolan, in the Bible, Golan is mentioned as a city of refuge located in Bashan, Deuteronomy 4,43, Joshua 20,8,1 Chronicles 6,71. Nineteenth-century authors interpreted the word Golan as meaning something surrounded, hence a district, the Greek name for the region is Gaulanitis. In the Mishna the name is Gablān similar to Aramaic language names for the region, Gawlāna, Guwlana, Arab cartographers of the Byzantine period referred to the area as jabal, though the region is a plateau. The Muslims took over in 7th century CE, the 1906 Jewish Encyclopedia refers to the region as Gaulonitis. The name Golan Heights was not used before the 19th century, the Golan Heights borders Israel, Lebanon, and Jordan
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Physical Address Extension
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In computing, Physical Address Extension, sometimes referred to as Page Address Extension, is a memory management feature for the IA-32 architecture. PAE was first introduced in the Pentium Pro and it defines a page table hierarchy of three levels, with table entries of 64 bits each instead of 32, allowing these CPUs to access a physical address space larger than 4 gigabytes. It also uses the topmost bit of the 64-bit page table entry as an NX bit, PAE was first implemented in the Intel Pentium Pro in 1995, although the accompanying chipsets usually lacked support for the required extra address bits. PAE is supported by Intel Pentium Pro and later Pentium-series processors, the first Pentium M family processors introduced in 2003 also support PAE, however, they do not show the PAE support flag in their CPUID information. It was also available on AMD processors including the AMD Athlon, when AMD defined their AMD64 architecture as an extension of x86, they defined an enhanced version of PAE to be used while the processor was in 64-bit mode. It supports up to 48-bit virtual addresses, 52-bit physical addresses and this version of PAE is the mandatory memory paging model in long mode on x86-64 processors, there is no non-PAE mode while in long mode. The documentation for Intel 64, the Intel version of x86-64, with PAE, IA-32 architecture is augmented with additional address lines used to select the additional memory, so physical address size increases from 32 bits to 36 bits. This increases the physical memory addressable by the system from 4 GB to 64 GB, the 32-bit size of the virtual address is not changed, so regular application software continues to use instructions with 32-bit addresses and is limited to 4 gigabytes of virtual address space. Operating systems supporting this mode use page tables to map the regular 4 GB address space into the physical memory, the mapping is typically applied separately for each process, so that the extra memory is useful even though no single regular application can access it all simultaneously. Later work associated with AMDs development of x86-64 architecture expanded the theoretical possible size of addresses to 52 bits. Enabling PAE causes major changes to this scheme, by default, the size of each page remains as 4 KB. Each entry in the table and page directory becomes 64 bit long, instead of 32 bits. However, the size of tables does not change, so both table and directory now have only 512 entries, the entries in the page directory have an additional flag in bit 7, named PS. If the system has set this bit to 1, the directory entry does not point to a page table but to a single. In processors that implement the no-execute or execution disable feature, the most significant bit is the NX bit, the next eleven most significant bits are reserved for operating system use by both Intel and AMDs architecture specifications. Thus, from 64 bits in the table entry,12 low-order and 12 high-order bits have other uses. Combined with 12 bits of offset within page from the linear address and this allows a maximum RAM configuration of 252 bytes, or 4 petabytes. Currently 48 bits of virtual page number are translated, giving an address space of up to 256 TB
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Dothan (ancient city)
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Dothan was a biblical city located north of Shechem, about 100 km north of Hebron. Eusebius places it 12 miles to the north of Sebaste and it has been identified with Tel Dothan located ten kilometers southwest of Jenin, near Dotan Junction of Route 60. It later appears as the residence of Elisha and the scene of a vision of chariots, the city served as an Israelite administrative center during this period and archaeology has discovered a large complex and Hebrew inscriptions from the site. The Israeli settlement of Mevo Dotan is named for the city, as is Dothan, archaeology of Israel List of biblical places SWP map 11, IAA SWP map 11, Wikimedia commons Dothan, Remains from the tel, Daniel M. Master
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90 nanometer
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The origin of the 90 nm value is historical, as it reflects a trend of 70% scaling every 2–3 years. The naming is formally determined by the International Technology Roadmap for Semiconductors, the 193 nm wavelength was introduced by many companies for lithography of critical layers mainly during the 90 nm node. Yield issues associated with this transition were reflected in the costs associated with this transition. Even more significantly, the 300 mm wafer size became mainstream at the 90 nm node, the previous wafer size was 200 mm diameter. Use of 300 mm wafer size Use of KrF lithography with optical proximity correction 512 Mbit 1
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Binary-coded decimal
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In computing and electronic systems, binary-coded decimal is a class of binary encodings of decimal numbers where each decimal digit is represented by a fixed number of bits, usually four or eight. Special bit patterns are used for a sign or for other indications. The precise 4-bit encoding may vary however, for technical reasons, the ten states representing a BCD decimal digit are sometimes called tetrades with those dont care-states unused named pseudo-tetrads or pseudo-decimal digit). BCDs principal drawbacks are an increase in the complexity of the circuits needed to implement basic arithmetics. BCD was used in many early computers, and is implemented in the instruction set of machines such as the IBM System/360 series and its descendants. BCD takes advantage of the fact that any one decimal numeral can be represented by a four bit pattern, the most obvious way of encoding digits is natural BCD, where each decimal digit is represented by its corresponding four-bit binary value, as shown in the following table. This is also called 8421 encoding, other encodings are also used, including so-called 4221 and 7421 — named after the weighting used for the bits — and excess-3. For example, the BCD digit 6, 0110b in 8421 notation, is 1100b in 4221, 0110b in 7421, Packed, Two numerals are encoded into a single byte, with one numeral in the least significant nibble and the other numeral in the most significant nibble. To represent numbers larger than the range of a single byte any number of contiguous bytes may be used, also note how packed BCD is more efficient in storage usage as compared to unpacked BCD, encoding the same number in unpacked format would consume twice the storage. Shifting and masking operations are used to pack or unpack a packed BCD digit, other logical operations are used to convert a numeral to its equivalent bit pattern or reverse the process. BCD is very common in systems where a numeric value is to be displayed, especially in systems consisting solely of digital logic. By employing BCD, the manipulation of data for display can be greatly simplified by treating each digit as a separate single sub-circuit. This matches much more closely the reality of display hardware—a designer might choose to use a series of separate identical seven-segment displays to build a metering circuit. If the numeric quantity were stored and manipulated as pure binary, therefore, in cases where the calculations are relatively simple, working throughout with BCD can lead to a simpler overall system than converting to and from binary. Most pocket calculators do all their calculations in BCD, the same argument applies when hardware of this type uses an embedded microcontroller or other small processor. Often, smaller code results when representing numbers internally in BCD format, for these applications, some small processors feature BCD arithmetic modes, which assist when writing routines that manipulate BCD quantities. In Packed BCD, each of the two nibbles of each byte represent a decimal digit, Packed BCD has been in use since at least the 1960s and is implemented in all IBM mainframe hardware since then. Most implementations are big endian, i. e. with the more significant digit in the half of each byte
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Intel 4004
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The Intel 4004 is a 4-bit central processing unit released by Intel Corporation in 1971. It was the first commercially available microprocessor by Intel, the chip design started in April 1970, when Federico Faggin joined Intel, and it was completed under his leadership in January 1971. The first commercial sale of the fully operational 4004 occurred in March 1971 to Busicom Corp. of Japan for which it was originally designed and built as a custom chip. In mid-November of the year, with the prophetic ad Announcing a new era in integrated electronics. The 4004 is history’s first monolithic CPU, fully integrated in one small chip, the 4004 microprocessor is one of 4 chips constituting the MCS-4 chip-set, which includes the 4001 ROM,4002 RAM, and 4003 Shift Register. With these components, small computers with varying amounts of memory, both the AL1 and the MP944 use several chips for the implementation of the CPU function. The TMS0100 chip was presented as a “calculator on a chip” with the original designation TMS1802NC and this chip contains a very primitive CPU and can only be used to implement various simple 4-function calculators. It is the precursor of the TMS1000, introduced in 1974, which is considered the first microcontroller i. e. a computer on a chip containing not only the CPU, but also ROM, RAM, and I/O functions. The MCS-4 was eventually superseded by powerful microcontrollers like the Intel 8048, the architecture of this processor formed the basis for later models of microprocessors. The first public mention of 4004 was an advertisement in the November 15,1971 edition of Electronic News, Faggin, the sole chip designer among the engineers on the MCS-4 project, was the only one with experience in metal-oxide semiconductor random logic and circuit design. He also had the knowledge of the new silicon gate process technology with self-aligned gates. At Fairchild in 1968, Faggin also designed and manufactured the worlds first commercial IC using SGT and his methodology set the design style for all the early Intel microprocessors and later for the Zilog Z80. He also led the MCS-4 project and was responsible for its successful outcome, Marcian Ted Hoff, head of the Application Research Department, contributed the architectural proposal for Busicom working with Stanley Mazor in 1969, then he moved on to other projects. Shima designed the Busicom calculator firmware and assisted Faggin during the first six months of the implementation, the manager of Intels MOS Design Department was Leslie L. Vadász. using Intel’s newly developed dynamic RAM memory. This resulted in the 4004 architecture, which is part of a family of chips, including ROM, DRAM and it was not until the development of the 40-pin 8080 in 1974 that the address and data buses would be separated, giving faster and simpler access to memory. The original clock rate design goal was 1 MHz, the same as the IBM1620 Model I. The Intel 4004 was designed by cutting sheets of Rubylith into thin strips to lay out the circuits to be printed. For the purpose of testing the produced chips, Faggin developed a tester for silicon waffers of MCS-4 family that was driven by 4004 chip
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Intel 8008
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The Intel 8008 is an early byte-oriented microprocessor designed and manufactured by Intel and introduced in April 1972. It was an 8-bit CPU with an external 14-bit address bus that could address 16 KB of memory, originally known as the 1201, the chip was commissioned by Computer Terminal Corporation to implement an instruction set of their design for their Datapoint 2200 programmable terminal. As the chip was delayed and did not meet CTCs performance goals, an agreement permitted Intel to market the chip to other customers after Seiko expressed an interest in using it for a calculator. CTC formed in San Antonio in 1968 under the direction of Austin O. Gus Roche and Phil Ray, Roche, in particular, was primarily interested in producing a desktop computer. However, given the immaturity of the market, the business plan mentioned only a Teletype Model 33 ASR replacement. The case was designed to fit in the same space as an IBM Selectric typewriter. Although commercially successful, the 3300 had ongoing problems due to the amount of circuitry packed into such a small space. In order to address the heating and other issues, a re-design started that featured the CPU part of the internal circuitry re-implemented on a single chip, looking for a company able to produce their chip design, Roche turned to Intel, then primarily a vendor of memory chips. Roche met with Bob Noyce, who expressed concern with the concept, John Frassanito recalls that Noyce said it was an idea, and that Intel could do it. He said that if you have a chip, you can only sell one chip per computer, while with memory. Nevertheless, Noyce agreed to a $50,000 development contract in early 1970, texas Instruments was also brought in as a second supplier. TI was able to make samples of the 1201 based on Intel drawings, CTC decided to re-implement the new version of the terminal using discrete TTL instead of waiting for a single chip CPU. The new system was released as the Datapoint 2200 in the spring 1970, CTC paused development of the 1201 after the 2200 was released, as it was no longer needed. By that point CTC had once again moved on, this time to the Datapoint 2200 II, the 1201 was no longer powerful enough for the new model. CTC voted to end their involvement with the 1201, leaving the designs intellectual property to Intel instead of paying the $50,000 contract, Intel renamed it the 8008, and put it in their catalog in April 1972 priced at $120. Intels initial worries about their existing customer base leaving them proved unfounded, and this was followed by the Intel 8080, and then the hugely successful Intel x86 family. One of the first teams to build a system around the 8008 was Bill Pentz team at California State University. The project started in the spring of 1972 and with key help from Tektronix the system was fully functional a year later, Bill assisted Intel with the MCS-8 kit and provided key input to the Intel 8080 instruction set which helped make it useful for the industry and hobbyists
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