The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1, 1995. It introduced the P6 microarchitecture and was intended to replace the original Pentium in a full range of applications. While the Pentium and Pentium MMX had 3.1 and 4.5 million transistors the Pentium Pro contained 5.5 million transistors. It was reduced to a more narrow role as a server and high-end desktop processor and was used in supercomputers like ASCI Red, the first computer to reach the teraFLOPS performance mark; the Pentium Pro was capable of both dual- and quad-processor configurations. It only came in one form factor, the large rectangular Socket 8; the Pentium Pro was succeeded by the Pentium II Xeon in 1998. The lead architect of Pentium Pro was Fred Pollack, specialized in superscalarity and had worked as the lead engineer of the Intel iAPX 432; the Pentium Pro incorporated a new microarchitecture, different from the Pentium's P5 microarchitecture. It has a 14-stage superpipelined architecture which used an instruction pool.

The Pentium Pro featured many advanced concepts not found in the Pentium, although it wasn't the first or only x86 processor to implement them. The Pentium Pro pipeline had extra decode stages to dynamically translate IA-32 instructions into buffered micro-operation sequences which could be analysed and renamed in order to detect parallelizable operations that may be issued to more than one execution unit at once; the Pentium Pro thus featured out of order execution, including speculative execution via register renaming. It had a wider 36-bit address bus, allowing it to access up to 64 GB of memory; the Pentium Pro has an 8 KB instruction cache, from which up to 16 bytes are fetched on each cycle and sent to the instruction decoders. There are three instruction decoders; the decoders are not equal in capability: only one can decode any x86 instruction, while the other two can only decode simple x86 instructions. This restricts the Pentium Pro's ability to decode multiple instructions limiting superscalar execution.

X86 instructions are decoded into 118-bit micro-operations. The micro-ops are RISC-like; the general decoder can generate up to four micro-ops per cycle, whereas the simple decoders can generate one micro-op each per cycle. Thus, x86 instructions that operate on the memory can only be processed by the general decoder, as this operation requires a minimum of three micro-ops; the simple decoders are limited to instructions that can be translated into one micro-op. Instructions that require more micro-ops than four are translated with the assistance of a sequencer, which generates the required micro-ops over multiple clock cycles; the Pentium Pro was the first processor in the x86-family to support upgradeable microcode under BIOS and/or operating system control. Micro-ops exit the re-order buffer and enter a reserve station, where they await dispatch to the execution units. In each clock cycle, up to five micro-ops can be dispatched to five execution units; the Pentium Pro has a total of six execution units: two integer units, one floating-point unit, a load unit, store address unit, a store data unit.

One of the integer units shares the same ports as the FPU, therefore the Pentium Pro can only dispatch one integer micro-op and one floating-point micro-op, or two integer micro-ops per a cycle, in addition to micro-ops for the other three execution units. Of the two integer units, only the one that shares the path with the FPU on port 0 has the full complement of functions such as a barrel shifter, multiplier and support for LEA instructions; the second integer unit, connected to port 1, does not have these facilities and is limited to simple operations such as add and the calculation of branch target addresses. The FPU executes floating-point operations. Addition and multiplication have a latency of three and five cycles, respectively. Division and square-root are not pipelined and are executed in separate units that share the FPU's ports. Division and square root have a latency of 29-69 cycles, respectively; the smallest number is for single precision floating-point numbers and the largest for extended precision numbers.

Division and square root can operate with adds and multiplies, preventing them from executing only when the result has to be stored in the ROB. After the microprocessor was released, a bug was discovered in the floating point unit called the "Pentium Pro and Pentium II FPU bug" and by Intel as the "flag erratum"; the bug occurs under some circumstances during floating point-to-integer conversion when the floating point number won't fit into the smaller integer format, causing the FPU to deviate from its documented behaviour. The bug is considered to be minor and occurs under such special circumstances that few, if any, software programs are affected; the Pentium Pro P6 microarchitecture was used in one form or another by Intel for more than a decade. The pipeline would scale from its initial 150 MHz start, all the way up to 1.4 GHz with the "Tualatin" Pentium III. The design's various traits would continue after that in the derivative core called "Banias" in Pentium M and Intel Core, which itself would evolve into the Core microarchitecture in 2006 and onward.

Despite being advanced for the time, the Pentium Pro's out-of-order register renaming architecture had trouble with running 16-bit code and mixed code (8/16-bit

Stanway is a small crossroads village in the county of Gloucestershire and about 1 mile south of Stanton: both villages are on the Cotswold Way. The population of Stanway taken at the 2011 census was 343, it is part of the Tewkesbury Borough Council area. The village is dominated by Stanway House, a Jacobean manor house, owned by the Earl of Wemyss and March. In recent years the house has seen restoration, ongoing; the Estate contains the single highest gravity-fed fountain in the UK at just over 300 feet. It can be seen for several miles when running; the gate of Stanway House is the finish of the 1st Stage of the Cotswold Way Relay race. St Peter's Church was rebuilt in the 12th century, the tower added in the 13th century and the whole building restored in 1896; the Tithe Barn was built in the 14th century for Tewkesbury Abbey. The bell tower contains a ring of five bells dating from 2014 1625, 1904, 1826 and 1634, they are hung for English Change Ringing and were restored in 2015. The largest bell is listed for preservation.

It weighs just over 11cwt. Stanway war memorial is situated at the south side of the village, at the junction of the B4077 road and the southernmost end of the Stanton Road; the bronze of St George and the Dragon is by Alexander Fisher, the stone column and plinth by Sir Philip Stott carved by Eric Gill. The war memorial in the church chancel is by Fisher and Gill. Stanway has a fenced ground, in the middle of a field; the field has an undulating surface, made uneven to make landing difficult for - hypothetical - German gliders during the Second World War. The cricket ground - itself flat - possesses a pavilion, built on staddle stones, was the gift of the author J. M. Barrie who stayed at Stanway House in the 1920s, it is famous lore among the area, that Barrie formed his own “literary cricket team”, promising the club he would help pay for the pavilion if he took a hat-trick. The manor house has reopened its brewery, one of only two coal-fired brewing houses in the country. For many years, the Stanway Flower Show was held in the hamlet - and many people travelled to visit the show.

The Tithe Barn hosted the exhibits, which included flowers and handcrafts, there was a number of stalls - including a coconut shy and nine-pin bowling - in the grounds of Stanway House. Taddington lies above Stanway. Wood Stanway lies a little less than a mile to the south of Stanway, on the other side of the B4077. Gloucestershire: the Cotswolds, David Verey, Pevsner Architectural Guides: The Buildings of England, Penguin, 1970, ISBN 0-14-071040-X. Pp. 414–417. Media related to Stanway, Gloucestershire at Wikimedia Commons GENUKI page

The Popular Sin is a lost 1926 American comedy silent film directed by Malcolm St. Clair, written by Monta Bell and James Ashmore Creelman, starring Florence Vidor, Clive Brook, Greta Nissen, Philip Strange, George Beranger and Iris Gray, it was released on November 1926, by Paramount Pictures. Florence Vidor as Yvonne Montfort Clive Brook as Jean Corot Greta Nissen as La Belle Toulaise Philip Strange as George Montfort George Beranger as Alphonse Martin Iris Gray as Lulu The film is lost. Only fragments of reel 6 are in the Library of Congress collection; the Popular Sin on IMDb synopsis at AllMovie