PlayStation 2 technical specifications
The PlayStation 2 technical specifications describe the various components of the PlayStation 2 (PS2) video game console.
The sixth-generation hardware of the PlayStation 2 video game console consists of various components. At the heart of the console's configuration is its central processing unit (CPU), a custom RISC processor known as the Emotion Engine which operates at 294 MHz (300 MHz in later consoles); the CPU heavily relies on its integration with two vector processing units, known as VPU0 and VPU1, the Graphics Synthesizer, and a floating-point unit (FPU) in order to render 3D graphics. Other components, such as the system's DVD-ROM optical drive and DualShock 2 controller, provide the software and user control input.
PlayStation 2 software is distributed on CD-ROM and DVD-ROM. In addition, the console can play audio CDs and DVD movies, and is backwards compatible with original PlayStation games; this is accomplished through the inclusion of the original PlayStation's CPU which also serves as the PS2's I/O processor. The PS2 also supports limited functionality with the original PlayStation memory cards and controllers; the PS2's DualShock 2 controller is an upgraded version of the PlayStation's DualShock with analog face, shoulder and D-pad buttons replacing the digital buttons of the original. Like its predecessor, the DualShock 2 controller features force feedback technology.
The standard PlayStation 2 memory card has an 8 MB capacity and uses Sony's MagicGate encryption; this requirement prevented the production of memory cards by third parties who did not purchase a MagicGate license. Memory cards without encryption can be used to store PlayStation game saves, but PlayStation games would be unable to read from or write to the card – such a card could only be used as a backup. There are a variety of non-Sony manufactured memory cards available for the PlayStation 2, allowing for a larger memory capacity than the standard 8 MB; however their use is unsupported and compatibility is not guaranteed. These memory cards can have up to 128 MB storage space.
The console also features USB and IEEE 1394 expansion ports. Compatibility with USB and IEEE 1394 devices is dependent on the software supporting the device. For example, the PS2 BIOS will not boot an ISO image from a USB flash drive or operate a USB printer, as the machine's operating system does not include this functionality. By contrast, Gran Turismo 4 and Tourist Trophy are programmed to save screenshots to a USB mass storage device and print images on certain USB printers. A PlayStation 2 HDD can be installed via the expansion bay in the back of the console, and was required to play certain games, notably the popular Final Fantasy XI.
Central processing unit
- CPU: MIPS III R5900-based "Emotion Engine", clocked at 294.912 MHz (299 MHz on newer versions), with 128-bit SIMD capabilities
- 250 nm CMOS manufacturing (ending with 65 nm CMOS), 13.5 million transistors, 225 mm² die size, 15 W dissipation (combined EE+GS in SCPH-7500x: 86 mm², 53.5 million transistors) (combined EE+GS+RDRAM+DRAM in SCPH-7900x ended with 65nm CMOS design)
- CPU core: MIPS R5900 (COP0), 64-bit, little endian (mipsel). CPU is a superscalar, in-order 2-issue design with 6-stage long integer pipelines, four 32-bit GPR registers, 32 128-bit SIMD linear scalar registers, two 64-bit integer ALUs, 128-bit load-store unit (LSU) and a branch execution unit (BXU).
- Instruction set: MIPS III, MIPS IV subset with Sony's proprietary 107 vector SIMD multimedia instructions (MMI). The custom instruction set was implemented by grouping the two 64-bit integer ALUs.
- 32-bit FPU coprocessor (COP1) with 6-stage long pipeline (floating point multiply accumulator × 1, floating point divider × 1). FPU is not IEEE compliant.
- 32-bit VLIW-SIMD vector units at 147.456 MHz: VPU0 and VPU1 (floating point multiply accumulator × 9, floating point divider × 1) each VPU contains a vector unit (VU), instruction cache, data cache and interface unit. Each vector unit also has upper execution unit containing 4xfMAC and lower execution unit containing fDIV, integer ALU, load-store unit, branch logic, 16 16-bit integer registers and 32 128-bit floating point registers. VPU1 has an additional EFU unit.
- VPU0 (COP2) (FMAC x 4, FDIV x 1) is tightly coupled with the main CPU and is typically used for polygon and geometry transformations (under parallel or serial connection), physics and other gameplay related tasks
- VPU1 (Elementary Functional Unit-EFU) (FMAC x 5, FDIV x 2) operates independently controlled by microcode, parallel to the CPU core, is typically used for polygon and geometry transformations, clipping, culling, lighting and other visual based calculations (texture matrix able for 2 coordinates (UV/ST)
- Parallel: results of VU0/FPU sent as another display list via MFIFO (E.G. complex characters/vehicles/etc.)
- Serial: results of VU0/FPU sent to VU1 (via 3 methods) and can act as an optional geometry pre-processor that does all base work to update the scene every frame (E.G. camera, perspective, boning and laws of movement such as animations or physics)
- Image Processing Unit (IPU): MPEG-2 compressed image macroblock layer decoder allowing playback of DVDs and game FMV. It also allowed vector quantization for 2D graphics data.
- Memory management unit (MMU), RDRAM controller and DMA controller: handle memory access within the system
- Cache memory: 16 KB instruction cache, 8 KB + 16 KB scratchpad (ScrP) data cache
- Scratchpad (SPR) is extended area of memory visible to the EE CPU. This extended memory provides 16 kilobytes of fast RAM available to be used by the application. Scratchpad memory can be used to store temporary data that is waiting to be sent via DMA or for any other temporary storage that the programmer can define.
- I/O processor interconnection: remote procedure call over a serial link, DMA controller for bulk transfer
- Main RDRAM memory bus. Bandwidth: 3.2 GB/s
- Graphics interface (GIF), DMA channel that connects the EE CPU to the GS co-processor. To draw something to the screen, one must send render commands to the GS via the GIF channel: 64-bit, 150 MHz bus, maximum theoretical bandwidth of 1.2 GB/s.
- Display lists generated by CPU/VPU0 and VPU1 are sent to the GIF, which prioritizes them before dispatching them to the Graphics Synthesizer for rendering.
- Vector Unit Interface (VIF), consists of two DMA channels VIF0 for VPU0 and VIF1 for VPU1. Vector units and the main CPU communicate via VIF DMA channels.
- SIF – Serial Interface or Subsystem Interface which consists of 3 DMA channels:
- Subsystem Interface 0 (SIF0) and Subsystem Interface 1 (SIF1), used for communication between the EE main CPU and IOP co-processor. These are serial DMA channels where both CPUs can send commands and establish communication through an RPC protocol.
- Subsystem Interface 2 (SIF2), used for backwards compatibility with PS1 games and debugging.
- Floating point performance: 6.2 GFLOPS (single precision 32-bit floating point)
- Tri-strip geometric transformation (VU0+VU1): 150 million vertices per second
- 3D CG geometric transformation with raw 3D perspective operations (VU0+VU1): 66-80+ million vertices per second
- 3D CG geometric transformations at peak bones/movements/effects (textures)/lights (VU0+VU1, parallel or series): 15–20 million vertices per second
- Lighting: 38 million polygons/sec
- Fog: 36 million polygons/sec
- Curved surface generation (Bezier): 16 million polygons/sec
- Image processing performance: 150 million Pixels/sec
- Actual real-world polygons (per frame): 500-650k at 30 FPS, 250-325k at 60 FPS
- Instructions per second: 6,000 MIPS (million instructions per second)
- Main memory: 32 MB PC800 32-bit dual-channel (2x 16-bit) RDRAM (Direct Rambus DRAM) @ 400 MHz, 3.2 GB/s peak bandwidth
Graphics processing unit
- Parallel rendering processor with embedded DRAM "Graphics Synthesizer" (GS) clocked at 147.456 MHz
- 279 mm² die (combined EE+GS in SCPH-7500x: 86 mm², 53.5 million transistors)
- PCRTC circuit for output
- Pixel pipelines: 16 without any texture mapping units (TMU), however half of pixel pipelines can perform texturing so fillrate is either 16 pixels per clock with untextured 2400 mpixels or 8 pixels per clock with 1200 megapixels with bilinear texturing, and 1200 megatexels (bilinear).
- Video output resolution: Variable from 256 x 224 to 1920 x 1080
- 4 MB of embedded DRAM as video memory (an additional 32 MB of main memory can be used as video memory for off-screen textures); 48 gigabytes per second peak bandwidth
- Texture buffer bandwidth: 9.6 GB/s
- Frame buffer bandwidth: 38.4 GB/s
- eDRAM bus width: 2560-bit (composed of three independent buses: 1024-bit write, 1024-bit read, 512-bit read/write)
- Pixel configuration: RGB: Alpha:Z Buffer (24:8, 15:1 for RGB, 16, 24, or 32-bit Z buffer)
- Display color depth: 32-bit (RGBA: 8 bits each)
- Dedicated connection to main CPU and VU1
- Overall pixel fillrate: 16×147 = 2.352 gigapixel/s
- 1.2 gigapixel/s(with Z buffer, Alpha and Texture)
- Pixel fillrate: with no texture, flat shaded 2.4 (75,000,000 32-pixel raster triangles)
- Pixel fillrate: with 1 full texture (diffuse map), Gouraud shaded 1.2 (37,750,000 32-bit pixel raster triangles)
- Pixel fillrate: with 2 full textures (diffuse map + specular or alpha or other), Gouraud shaded 0.6 (18,750,000 32-bit pixel raster triangles)
- Texture fillrate: 1.2 Gtexel/s
- Sprite drawing rate: 18.75 million (8 x 8 pixels)
- Particle drawing rate: 150 million/s
- Polygon drawing rate: 75 million/s (small polygon)
- 50 million/s (48-pixel quad with Z and A)
- 30 million/s (50-pixel triangle with Z and A)
- 25 million/s (48-pixel quad with Z, A and T)
- 16 million/s (75-pixel triangle with Z, A, T and Fog)
- VESA (maximum 1280 x 1024 pixels)
- 3 rendering paths (path 1, 2 and 3)Bump Mapping, Dot3 Bump Mapping (Normal Mapping), multiple-light sources, per-vertex lighting, Volumetric Fog, Mipmapping, LOD, Spherical Harmonic Lighting, High Dynamic Range(HDR) Rendering, Motion Blur, Heat Haze, Bloom, Depth of Field, Shadow Volumes, Shadow Mapping, Lightmapping, Environment Mapping, Render to Texture, Alpha Blending, Alpha Test, Destination Alpha Test, Depth Test, Scissor Test, Transparency effects, framebuffer effects, post-processing effects, Perspective-Correct Texture Mapping, Edge-AAx2 (poly sorting required), Bilinear, Trilinear texture filtering, Multi-pass, Palletizing (4-bit = 6:1 ratio, 8-bit = 3:1), NURBS, Bezier Curves, Bezier Surfaces, B-Splines, Offscreen Drawing, Framebuffer Mask, Flat Shading, Gouraud Shading, Cel Shading, Dithering, Texture Swizzling.
- Multi-pass rendering ability
- Audio: "SPU1+SPU2" (SPU1 is actually the CPU clocked at 8 MHz and SPU2 is PS1 SPU)
- Sound Memory: 2 MB
- Number of voices: 48 hardware channels of ADPCM on SPU2 plus software-mixed definable, programmable channels
- Sampling Frequency: 44.1 kHz or 48 kHz (selectable)
- PCM audio source
- Digital effects include:
- Pitch Modulation
- Digital Reverb
- Load up to 512K of sampled waveforms
- Supports MIDI Instruments
- Output: Dolby Digital 5.1 Surround sound, DTS (Full motion video only), later games achieved analog 5.1 surround during gameplay through Dolby Pro Logic II
- Input Output Processor (IOP)
- I/O Memory: 2 MB EDO DRAM
- CPU Core: Original PlayStation CPU (MIPS R3000A clocked at 33.8688 MHz or 37.5 MHz+PS1 GTE and MDEC for backwards compatibility with PS1 games)
- Automatically underclocked to 33.8688 MHz to achieve hardware backwards compatibility with original PlayStation format games.
- Sub Bus: 32-bit
- Connection to: SPU and CD/DVD controller.
- 2 proprietary PlayStation controller ports (250 kHz clock for PS1 and 500 kHz for PS2 controllers)
- 2 proprietary Memory Card slots using MagicGate encryption (250 kHz for PS1 cards. Up to 2 MHz for PS2 cards with an average sequential read/write speed of 130KB/s)
- 2 USB 1.1 ports with an OHCI-compatible controller
- AV Multi Out (Composite video, S-Video, RGBS (SCART), RGsB (VGA connector†), YPBPR(component), and D-Terminal)
- RFU DC Out
- S/PDIF Digital Out
- Expansion Bay for 3.5" HDD and Network Adaptor (required for HDD, SCPH-300xx to 500xx only)
- PC Card slot for Network Adaptor (PC Card type) and External Hard Disk Drive (SCPH-10000, SCPH-15000, SCPH-18000 models)
- Emotion Engine (EE) includes an on-chip Serial I/O port(SIO) used internally by the EE's kernel to output debugging and messages and to start the kernel debugger.
- Ethernet port (Slim only)
- i.LINK (also known as FireWire) (SCPH-10000 to 3900x only)
- Infrared remote control port (SCPH-500xx and newer)
^† VGA connector is only available for progressive-scan supporting games, homebrew-enabled systems, and Linux for PlayStation 2, and requires a monitor that supports RGsB, or "sync on green," signals.
Optical disc drive
- Disc Drive type: proprietary interface through a custom micro-controller + DSP chip. 24x speed CD-ROM [3.6 MB/s], 4x speed DVD-ROM [5.28 MB/s] — region-locked with copy protection.
- Supported Disc Media: PlayStation 2 format CD-ROM, PlayStation format CD-ROM, CD-DA, PlayStation 2 format DVD-ROM, DVD Video. DVD5 (Single-layer, 4.7 GB) and DVD9 (Dual-layer, 8.5 GB) supported. Later models starting with SCPH-500xx are DVD+RW and DVD-RW compatible.
- PlayStation technical specifications
- PlayStation 3 technical specifications
- PlayStation 4 technical specifications
- Stuart, Keith (12 December 2013). "PS4 and Xbox One: so why aren't they backwards compatible?". the Guardian. Archived from the original on 14 June 2015.
- "Dual Shock 2 Review". IGN. September 27, 2001. Archived from the original on 2011-05-15. Retrieved February 7, 2011.
The biggest difference between the Dual Shock 2 and the original… all of the buttons and even the digital pad offer analog support. This means that the d-pad, the four face buttons and the four shift buttons are all pressure-sensitive and have 255 degrees of sensitivity, it is also worth noting that the Dual Shock 2 is a bit lighter than the original Dual Shock because it appears to have less in the way of gears for the vibration function of the controller.
- "Final Fantasy XI Review for PlayStation 2 – GameSpot". Uk.gamespot.com. March 23, 2004. Archived from the original on July 21, 2011. Retrieved November 11, 2010.
- John L. Hennessy and David A. Patterson. "Computer Architecture: A Quantitative Approach, Third Edition". ISBN 1-55860-724-2
- Keith Diefendorff. "Sony's Emotionally Charged Chip". Microprocessor Report, Volume 13, Number 5, April 19, 1999. Microdesign Resources.
- Hennessy, John L.; Patterson, David A. (29 May 2002). Computer Architecture: A Quantitative Approach (3 ed.). Morgan Kaufmann. ISBN 978-0-08-050252-6. Retrieved 9 April 2013.
- "ソニー、65nm対応の半導体設備を導入。3年間で2,000億円の投資". pc.watch.impress.co.jp. Archived from the original on 2016-08-13.
- "Tapping into the power of PS2" (PDF). Archived from the original (PDF) on July 20, 2011. Retrieved November 11, 2010.
- "Emotion". Kim L. Vu. Archived from the original on 14 June 2012. Retrieved 7 July 2011.
- "Aaron D Lanterman" (PDF). users.ece.gatech.edu. Archived (PDF) from the original on 2014-10-24.
- "Archived copy" (PDF). Archived (PDF) from the original on 2016-09-19. Retrieved 2016-02-07.CS1 maint: archived copy as title (link)
- "Vector Unit Architecture for Emotion Synthesis". Archived from the original on May 10, 2018. Retrieved April 26, 2017.
- "Designing and Programming the Emotion Engine" (PDF). Archived (PDF) from the original on April 28, 2017. Retrieved April 26, 2017.
- "Inside the Playstation 2". philvaz.com. Archived from the original on March 4, 2011. Retrieved July 1, 2011.
- "Archived copy". Archived from the original on 2014-10-06. Retrieved 2014-09-30.CS1 maint: archived copy as title (link)
- "GS Mode Selector: Development & Feedback". psx-scene.com. Archived from the original on 2014-12-03.
- GS User's Manual, Sony Computer Entertainment, 2001
- "Archived copy" (PDF). Archived (PDF) from the original on 2015-05-16. Retrieved 2016-01-25.CS1 maint: archived copy as title (link)
- "Practical Implementation of SH Lighting and HDR Rendering". slidegur.com. Archived from the original on 2016-10-09.
- "PS2 Programming Optimisations" (PDF). Archived from the original (PDF) on July 20, 2011. Retrieved November 11, 2010.
- "Model numbers for PlayStation 2 and PS2 accessories". Archived from the original on 2010-03-16.
- "Model numbers for PlayStation 2 and PS2 accessories". Archived from the original on 2010-03-16.
- "PlayStation 2 SCPH-39001 Instruction manual". Archived from the original on 2013-12-16. Retrieved 2013-12-16.
- "SCEI Launches PlayStation 2 New Model SCPH-50000" (PDF). Archived from the original (PDF) on 2014-10-27. Retrieved 2013-12-16.