1.
IBM POWER microprocessors
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IBM has a series of high performance microprocessors called POWER followed by a number designating generation, i. e. POWER1, POWER2, POWER3 and so forth up to the latest POWER9. These processors have used by IBM in their RS/6000, AS/400, pSeries, iSeries, System p, System i. They have also used in data storage devices by IBM and by other server manufacturers like Bull. The POWERn family of processors were developed in the late 1980s and are still in active development nearly 30 years later, in the beginning, they utilized the POWER instruction set architecture, but that evolved into PowerPC in later generations and then to Power Architecture. Today, only the naming scheme remains the same, modern POWER processors do not use the POWER ISA, in 1974 IBM started a project to build a telephone switching computer with, for the time, immense computational power. When the telephone switch project was cancelled IBM kept the design for the general purpose processor, many changes were made to the 801 design to allow for multiple execution units and the Cheetah processor had separate branch prediction, fixed-point, and floating-point execution units. By 1984 CMOS was chosen since it allowed an increase in the level of integration while improving transistor-logic performance. This was to become the first POWER processors using the first POWER ISA, in February 1990, the first computers from IBM to incorporate the POWER ISA were called the RISC System/6000 or RS/6000. These RS/6000 computers were divided into two classes, workstations and servers, and hence introduced as the POWERstation and POWERserver, the RS/6000 CPU had 2 configurations, called the RIOS-1 and RIOS.9. The POWER1 is the first microprocessor that used register renaming and out-of-order execution, a simplified and less powerful version of the 10 chip RIOS-1 was made in 1992 was developed for lower-end RS/6000s. It used only one chip and was called RISC Single Chip or RSC, RIOS-1 – the original 10-chip version RIOS. The POWER2 was a design, but IBM also made a single chip design of it. At the time of its introduction in 1996, the P2SC was the largest processor with the highest transistor count in the industry and was a leader in floating point operations. IBM joined the discussion and the three founded the AIM alliance to build the PowerPC ISA, heavily based on the POWER ISA, but with additions from both Apple and Motorola. It was to be a complete 32/64 bit RISC architecture, with a promise to range from low end embedded microcontrollers to the very high end supercomputer and server applications. After two years of development, the resulting PowerPC ISA was introduced in 1993 and it also added a 64-bit version of the ISA and support for SMP. The POWER3 began its life as PowerPC630, a successor of the commercially unsuccessful PowerPC620 and it used a combination of the POWER2 ISA and the 32/64-bit PowerPC ISA set with support for SMP and single-chip implementation. It was used to great extent in IBMs RS/6000 computers, while the second generation version, the POWER3 was the last processor to use a POWER instruction set, all subsequent models used some version of the PowerPC instruction set
2.
POWER5
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The POWER5 is a microprocessor developed and fabricated by IBM. It is a version of the POWER4. The principal improvements are support for simultaneous multithreading and a memory controller. The POWER5 is a microprocessor, with each core supporting one physical thread. Technical details of the microprocessor were first presented at the 2003 Hot Chips conference, a more complete description was given at Microprocessor Forum 2003 on 14 October 2003. The POWER5 was not sold openly and was used exclusively by IBM, systems using the microprocessor were introduced in 2004. The POWER5 competed in the enterprise server market, mostly against the Intel Itanium 2 and to a lesser extent, the Sun Microsystems UltraSPARC IV. It was superseded in 2005 by an iteration, the POWER5+. The POWER5 is a development of the POWER4. The addition of two-way multithreading required the duplication of the stack, program counter, instruction buffer, group completion unit. Most resources, such as the files and execution units, are shared. The POWER5 implements simultaneous multithreading, where two threads are executed simultaneously, the POWER5 can disable SMT to optimize for the current workload. As many resources such as the files are shared by two threads, they are increased in capacity in many cases to compensate for the loss of performance. The number of integer and floating-point registers is increased to 120 each, the floating-point instruction cache is also increased in capacity to 24 entries from 20. The capacity of the L2 unified cache was increased to 1.875 MB, the unified L3 cache was brought on-package instead of located externally in separate chips. Its capacity was increased to 36 MB, like the POWER4, the cache is shared by the two cores. The cache is accessed via two unidirectional 128-bit buses operating at half the core frequency, the on-die memory controller supports up to 64 GB of DDR and DDR2 memory. It uses high-frequency serial buses to communicate with external buffers that interface the dual inline memory modules to the microprocessor, the POWER5 contains 276 million transistors and has an area of 389 mm2
3.
PowerPC
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PowerPC is a RISC instruction set architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM. PowerPC was the cornerstone of AIMs PReP and Common Hardware Reference Platform initiatives in the 1990s and it has since become niche in personal computers, but remain popular as embedded and high-performance processors. Its use in game consoles and embedded applications provided an array of uses. In addition, PowerPC CPUs are still used in AmigaOne and third party AmigaOS4 personal computers, the history of RISC began with IBMs 801 research project, on which John Cocke was the lead developer, where he developed the concepts of RISC in 1975–78. 801-based microprocessors were used in a number of IBM embedded products, the RT was a rapid design implementing the RISC architecture. The result was the POWER instruction set architecture, introduced with the RISC System/6000 in early 1990, the original POWER microprocessor, one of the first superscalar RISC implementations, was a high performance, multi-chip design. IBM soon realized that a microprocessor was needed in order to scale its RS/6000 line from lower-end to high-end machines. Work on a one-chip POWER microprocessor, designated the RSC began, in early 1991, IBM realized its design could potentially become a high-volume microprocessor used across the industry. IBM approached Apple with the goal of collaborating on the development of a family of single-chip microprocessors based on the POWER architecture and this three-way collaboration became known as AIM alliance, for Apple, IBM, Motorola. In 1991, the PowerPC was just one facet of an alliance among these three companies. The PowerPC chip was one of joint ventures involving the three, in their efforts to counter the growing Microsoft-Intel dominance of personal computing. For Motorola, POWER looked like an unbelievable deal and it allowed them to sell a widely tested and powerful RISC CPU for little design cash on their own part. It also maintained ties with an important customer, Apple, and seemed to offer the possibility of adding IBM too, at this point Motorola already had its own RISC design in the form of the 88000 which was doing poorly in the market. Motorola was doing well with their 68000 family and the majority of the funding was focused on this, the 88000 effort was somewhat starved for resources. However, the 88000 was already in production, Data General was shipping 88000 machines, the 88000 had also achieved a number of embedded design wins in telecom applications. The result of various requirements was the PowerPC specification. The differences between the earlier POWER instruction set and PowerPC is outlined in Appendix E of the manual for PowerPC ISA v.2.02, when the first PowerPC products reached the market, they were met with enthusiasm. In addition to Apple, both IBM and the Motorola Computer Group offered systems built around the processors, Microsoft released Windows NT3.51 for the architecture, which was used in Motorolas PowerPC servers, and Sun Microsystems offered a version of its Solaris OS
4.
PowerPC 970
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The PowerPC970, PowerPC 970FX, PowerPC 970GX, and PowerPC 970MP, are 64-bit Power Architecture processors from IBM introduced in 2002. When used in Apple Inc. machines, they were dubbed the PowerPC G5, the 970 family was created through a collaboration between IBM and Apple. The project went under the codename GP-UL or Giga Processor Ultra Light, when Apple introduced the Power Mac G5, they stated that this was a five-year collaborative effort, with multiple future generations, but it was short-lived. Apple only used three variants of the processor, iBM’s JS20/JS21 blade modules and some low-end workstations and System p servers are based on PowerPC970. It is also used in high end embedded systems like Mercury’s Momentum XSA-200. IBM is also licensing the PowerPC970 core for use in custom applications, the PowerPC970 is a single core derivative of the POWER4 and can process both 32-bit and 64-bit PowerPC instructions natively. It has a hardware unit and a three way branch prediction unit. Like the POWER4, the front-end is nine stages long, the PowerPC970 can fetch and decode up to eight instructions, dispatch up to five to reserve stations, issue up to eight to the execution units and retire up to five per cycle. The execution pipelines were lengthened compared to the POWER4 to achieve higher clock frequencies and it has eight execution units, two arithmetic logic units, two double precision floating-point units, two load/store units and two AltiVec units. One of the AltiVec units executes integer and floating-point instructions, the latter has three subunits for simple integer, complex integer and floating-point instructions. These units have pipelines of varying lengths,10 stages for simple integer, the processor has two unidirectional 32-bit double data rate buses to the system controller chip running at one quarter of the processor core speed. The buses also carry addresses and control signals in addition to data so only a percentage of the bandwidth can be realized. As the buses are unidirectional, each direction can realize only half the aggregate bandwidth, the PowerPC970 was announced by IBM in October 2002. It was released in Apple Computers Power Mac G5 in June 2003, IBM released its first PowerPC970 blade servers, the BladeCenter JS20, in November 2003. The PowerPC970 had 512 KB of full-speed L2 cache and clock speeds from 1.6 to 2.0 GHz, the front side bus ran at half the processors clock speed. The PowerPC 970FX used a 90 nm manufacturing process and has a power rating of 11 watts at 149 degrees Fahrenheit while clocked at 1 GHz. The PowerPC 970s pipeline was lengthened from 9 stages to 16 -21 stages for the PowerPC970 FX. It has 10 functional units -2 Fixed-Point Units,2 Load/Store Units,2 Floating Point Units,1 Branch Unit,1 SIMD ALU unit,1 SIMD Permute unit, and 1 Condition Register
5.
Cell (microprocessor)
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It was developed by Sony, Toshiba, and IBM, an alliance known as STI. Cell is shorthand for Cell Broadband Engine Architecture, commonly abbreviated CBEA in full or Cell BE in part, the first major commercial application of Cell was in Sonys PlayStation 3 game console. Mercury Computer Systems has a dual Cell server, a dual Cell blade configuration, a computer. Toshiba had announced plans to incorporate Cell in high definition television sets, for these reasons, Cell is widely regarded as a challenging environment for software development. IBM provides a Linux-based development platform to help developers program for Cell chips, the architecture will not be widely used unless it is adopted by the software development community. However, Cells strengths may make it useful for scientific computing regardless of its mainstream success, in mid-2000, Sony Computer Entertainment, Toshiba Corporation, and IBM formed an alliance known as STI to design and manufacture the processor. The STI Design Center opened in March 2001, the Cell was designed over a period of four years, using enhanced versions of the design tools for the POWER4 processor. Over 400 engineers from the three worked together in Austin, with critical support from eleven of IBMs design centers. During this period, IBM filed many patents pertaining to the Cell architecture, manufacturing process, Each Processing Element contained 8 APUs, which are now referred to as SPEs on the current Broadband Engine chip. This chip package was widely regarded to run at a speed of 4 GHz and with 32 APUs providing 32 gigaFLOPS each. This design was fabricated using a 90 nm SOI process, in March 2007, IBM announced that the 65 nm version of Cell BE is in production at its plant in East Fishkill, New York. Bandai Namco Entertainment used the processor for their 357 arcade board as well as the subsequent 369. In February 2008, IBM announced that it begin to fabricate Cell processors with the 45 nm process. In May 2008, IBM introduced the high-performance double-precision floating-point version of the Cell processor, the worlds three most energy efficient supercomputers, as represented by the Green500 list, are similarly based on the PowerXCell 8i. The 45 nm Cell processor was introduced in concert with Sonys PlayStation 3 Slim in August 2009, by November 2009, IBM had discontinued the development of a Cell processor with 32 APUs but was still developing other Cell products. On May 17,2005, Sony Computer Entertainment confirmed some specifications of the Cell processor that would be shipping in the then-forthcoming PlayStation 3 console and this Cell configuration has one PPE on the core, with eight physical SPEs in silicon. The target clock-frequency at introduction is 3.2 GHz, the introductory design is fabricated using a 90 nm SOI process, with initial volume production slated for IBMs facility in East Fishkill, New York. The relationship between cores and threads is a source of confusion
6.
Xenon (processor)
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Microsoft XCPU, codenamed Xenon, is a CPU used in the Xbox 360 game console, to be used with ATIs Xenos graphics chip. The processor was developed by Microsoft and IBM under the IBM chip program codenamed Waternoose, the development program was originally announced on 2003-11-03. The processor is based on IBM PowerPC instruction set architecture and it consists of three independent processor cores on a single die. These cores are slightly modified versions of the PPE in the Cell processor used on the PlayStation 3, each core has two symmetric hardware threads, for a total of six hardware threads available to games. Each individual core also includes 32 KiB of L1 instruction cache and 32 KiB of L1 data cache, the XCPU processors are manufactured at IBMs East Fishkill, New York fabrication plant and Chartered Semiconductor Manufacturing in Singapore. Chartered reduced the process in 2007 to 65 nm from 90 nm. The XCGPU follows the trend started with the integrated EE+GS in PlayStation 2 Slimline, combining CPU, GPU, memory controllers, XCGPU contains 372 million transistors and is manufactured by GlobalFoundries on a 45 nm process. Compared to the chipset in the Xbox 360 the combined power requirements are reduced by 60%
7.
Apple Inc.
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Apple is an American multinational technology company headquartered in Cupertino, California that designs, develops, and sells consumer electronics, computer software, and online services. Apples consumer software includes the macOS and iOS operating systems, the media player, the Safari web browser. Its online services include the iTunes Store, the iOS App Store and Mac App Store, Apple Music, Apple was founded by Steve Jobs, Steve Wozniak, and Ronald Wayne in April 1976 to develop and sell personal computers. It was incorporated as Apple Computer, Inc. in January 1977, Apple joined the Dow Jones Industrial Average in March 2015. In November 2014, Apple became the first U. S. company to be valued at over US$700 billion in addition to being the largest publicly traded corporation in the world by market capitalization. The company employs 115,000 full-time employees as of July 2015 and it operates the online Apple Store and iTunes Store, the latter of which is the worlds largest music retailer. Consumers use more than one billion Apple products worldwide as of March 2016, Apples worldwide annual revenue totaled $233 billion for the fiscal year ending in September 2015. This revenue accounts for approximately 1. 25% of the total United States GDP.1 billion, the corporation receives significant criticism regarding the labor practices of its contractors and its environmental and business practices, including the origins of source materials. Apple was founded on April 1,1976, by Steve Jobs, Steve Wozniak, the Apple I kits were computers single-handedly designed and hand-built by Wozniak and first shown to the public at the Homebrew Computer Club. The Apple I was sold as a motherboard, which was less than what is now considered a personal computer. The Apple I went on sale in July 1976 and was market-priced at $666.66, Apple was incorporated January 3,1977, without Wayne, who sold his share of the company back to Jobs and Wozniak for $800. Multimillionaire Mike Markkula provided essential business expertise and funding of $250,000 during the incorporation of Apple, during the first five years of operations revenues grew exponentially, doubling about every four months. Between September 1977 and September 1980 yearly sales grew from $775,000 to $118m, the Apple II, also invented by Wozniak, was introduced on April 16,1977, at the first West Coast Computer Faire. It differed from its rivals, the TRS-80 and Commodore PET, because of its character cell-based color graphics. While early Apple II models used ordinary cassette tapes as storage devices, they were superseded by the introduction of a 5 1/4 inch floppy disk drive and interface called the Disk II. The Apple II was chosen to be the platform for the first killer app of the business world, VisiCalc. VisiCalc created a market for the Apple II and gave home users an additional reason to buy an Apple II. Before VisiCalc, Apple had been a distant third place competitor to Commodore, by the end of the 1970s, Apple had a staff of computer designers and a production line
8.
Microprocessor
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A microprocessor is a computer processor which incorporates the functions of a computers central processing unit on a single integrated circuit, or at most a few integrated circuits. Microprocessors contain both combinational logic and sequential digital logic, Microprocessors operate on numbers and symbols represented in the binary numeral system. The integration of a whole CPU onto a chip or on a few chips greatly reduced the cost of processing power. Integrated circuit processors are produced in numbers by highly automated processes resulting in a low per unit cost. Single-chip processors increase reliability as there are many electrical connections to fail. As microprocessor designs get better, the cost of manufacturing a chip generally stays the same, before microprocessors, small computers had been built using racks of circuit boards with many medium- and small-scale integrated circuits. Microprocessors combined this into one or a few large-scale ICs, the internal arrangement of a microprocessor varies depending on the age of the design and the intended purposes of the microprocessor. Advancing technology makes more complex and powerful chips feasible to manufacture, a minimal hypothetical microprocessor might only include an arithmetic logic unit and a control logic section. The ALU performs operations such as addition, subtraction, and operations such as AND or OR, each operation of the ALU sets one or more flags in a status register, which indicate the results of the last operation. The control logic retrieves instruction codes from memory and initiates the sequence of operations required for the ALU to carry out the instruction, a single operation code might affect many individual data paths, registers, and other elements of the processor. As integrated circuit technology advanced, it was feasible to manufacture more and more complex processors on a single chip, the size of data objects became larger, allowing more transistors on a chip allowed word sizes to increase from 4- and 8-bit words up to todays 64-bit words. Additional features were added to the architecture, more on-chip registers sped up programs. Floating-point arithmetic, for example, was not available on 8-bit microprocessors. Integration of the point unit first as a separate integrated circuit and then as part of the same microprocessor chip. Occasionally, physical limitations of integrated circuits made such practices as a bit slice approach necessary, instead of processing all of a long word on one integrated circuit, multiple circuits in parallel processed subsets of each data word. With the ability to put large numbers of transistors on one chip and this CPU cache has the advantage of faster access than off-chip memory, and increases the processing speed of the system for many applications. Processor clock frequency has increased more rapidly than external memory speed, except in the recent past, a microprocessor is a general purpose system. Several specialized processing devices have followed from the technology, A digital signal processor is specialized for signal processing, graphics processing units are processors designed primarily for realtime rendering of 3D images
9.
IBook
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The iBook was a line of laptop computers designed and marketed by Apple Inc. from 1999 to 2006. The line targeted entry-level, consumer and education markets, with specifications and prices than the PowerBook. It was the first mass consumer product to offer Wi-Fi network connectivity, the iBook had three different designs during its lifetime. The first, known as the Clamshell, was inspired by the design of Apples popular iMac line at the time, two years later, the second generation abandoned the original form factor in favor of a more conventional, rectangular design. In October 2003, a third iteration was released that added a PowerPC G4 chip, Apple replaced the iBook line with the MacBook in May 2006 during Apples transition to Intel processors. The MacBook has also evolved into different models, such as the MacBook Pro targeting high performance and they were also a major name for education, with Henrico County Public Schools being the first of many school systems in the United States to distribute one to every student. This left only the consumer portable space empty, leading to much rumor on the Internet of potential designs and features. Putting an end to speculation, on June 21,1999, Steve Jobs unveiled the iBook G3 during the keynote presentation of Macworld Conference & Expo. Like the iMac, the iBook G3 had a PowerPC G3 CPU, USB, Ethernet, modem ports and an optical drive were standard. The ports were left uncovered along the side, as a cover was thought to be fragile and unnecessary with the iBooks new interfaces. When the lid was closed, the hinge kept it firmly shut, the hinge included an integrated carrying handle. Additional power connectors on the surface allowed multiple iBook G3s to be charged on a custom-made rack. The iBook G3 was the first Mac to use Apples new Unified Logic Board Architecture, the iBook was the first mainstream computer designed and sold with integrated wireless networking. The display bezel contained the wireless antenna, which attached to an optional internal wireless card, lucent helped create this wireless capability which established the industry standard. Apple released the AirPort Wireless Base Station at the same time, there was heated debate over many things such as the aesthetics, features, weight, performance and pricing. To provide sufficient impact protection, the iBook was larger and heftier than the PowerBook of the time, standard features like PC card slots were absent, and so were speculated features such as touch screens and an ultra-long battery life. The iBook gained the label Barbies toilet seat, due to the distinctive design, nevertheless, this same design made the iBook G3 unmistakable in movies and television shows. The iBook was a commercial success, the line continually received processor, memory, hard disk upgrades and new colors
10.
Power Mac G4
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The Power Mac G4 is a series of personal computers that were designed, manufactured, and sold by Apple between 1999 and 2004. They used the PowerPC G4 series of microprocessors and they were heralded by Apple to be the first personal supercomputers, reaching speeds of 4 to 20 Gigaflops. They were the last Macintosh computers able to boot natively to Classic Mac OS. The original Apple Power Mac G4, code name Yikes. was introduced at the Seybold conference in San Francisco on August 31,1999, in October 1999, Apple was forced to postpone the 500 MHz because of poor yield of the 500 MHz chips. The higher-speed models, code name Sawtooth, used a greatly modified motherboard design with AGP 2x graphics, in December 1999, the entire Power Mac G4 line was updated to the AGP motherboard. The machines featured DVD-ROM drives as standard, the 400 MHz and 450 MHz versions had 100 MB Zip drives as standard equipment, and as an option on the 350 MHz Sawtooth. This series had a 100 MHz system bus and four PC100 SDRAM slots for up to 2 GB of RAM, the AGP Power Macs were the first to include an AirPort slot and DVI video port. The computers could house a total of three drives, two 128GB ATA hard drives and up to a single 20GB SCSI hard drive, with the installation of a SCSI card. The 500 MHz version was reintroduced on February 16,2000, DVD-RAM and Zip drives featured on these later 450 MHz and 500 MHz versions and were an option on the 400 MHz. Apples marketing name for all these early AGP models is Power Mac AGP Graphics, the code name Sawtooth was used internally before release and is a popular designation among enthusiasts. The design was updated at the Macworld Expo New York on July 19,2000, the new revision included dual-processor 450 MHz and 500 MHz versions, and it was also the first personal computer to include gigabit Ethernet as standard. The dual 500 MHz models featured DVD-RAM optical drive, Zip drives were optional on all models. These models also introduced Apples proprietary Apple Display Connector video port, Apples marketing name for this series is the Power Mac Gigabit Ethernet. A new line with a revamped motherboard but the familiar Graphite case debuted on January 9,2001 and it was essentially a future Quicksilver inside an older case. Motorola had added a pipeline stage in the new PowerPC G4 design to achieve faster clock frequencies. The models were offered in 466 MHz,533 MHz, dual 533 MHz,667 MHz and 733 MHz configurations, the number of RAM slots was reduced to three, accommodating up to 1.5 GB of PC133 SDRAM. The 733 MHz model was the first Macintosh to include a built-in DVD-R or Apple-branded SuperDrive and this was also the first series of Macs to include an nVidia graphics card, the GeForce 2MX. At Macworld Expo New York on July 18,2001, a new line debuted featuring a redesigned case known as Quicksilver
11.
Xserve
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Xserve was a line of rack unit computers designed by Apple Inc. for use as servers. When the Xserve was introduced in 2002, it was Apples first designated server hardware design since the Apple Network Server in 1996. and shipped with Mac OS X Server software. On November 5,2010, Apple announced that the Xserve line would be discontinued on January 31,2011 and replaced with the Mac Pro Server, Apple introduced the Xserve on May 14,2002. Initially, two options were available, a single-processor Xserve at US$2999 and a dual-processor Xserve at US$3999. Xserves sold before August 24,2002 shipped with Mac OS X v10.1 Puma Server, on February 10,2003, Apple released an improved and expanded Xserve lineup. Improvements included one or two 1.33 GHz PowerPC G4 processors, faster memory, and higher capacity Ultra ATA/133 hard disk drives, the front plate was redesigned for a slot-loading optical drive. On April 2,2003 the Xserve RAID was introduced, providing a higher capacity. On January 6,2004 Apple introduced the Xserve G5, a redesigned higher-performance Xserve, the 32-bit PowerPC G4s were replaced with one or two 64-bit PowerPC970 processors running at 2 GHz. Ventilation issues restricted it to three SATA hot-swap drive bays, with the space for the fourth drive bay used for air vents. The front plate and slot-loading optical drive were retained from the last Xserve G4, the higher memory capacity and bandwidth as well as the stronger floating-point performance of the PowerPC970 made it more suitable for high-performance computing applications. System X is one such cluster computer built with Xserves, three configuration options were available, a single-processor model at US$2999, a dual-processor model at $3999, and a dual-processor cluster node model at US$2999. On January 3,2005, Apple updated the Xserve G5 with faster processors in the dual-processor configurations,400 GB hard disks were made available for up to 1.2 TB of internal storage. The slot-loading optical drive was upgraded to a combination DVD-ROM/CD-RW standard, soon after, Apple updated the Xserve and Xserve RAID to allow the use of 500 GB Hard Drives. Xserve G5 models before April 2005 shipped with Mac OS X v10.3 Panther, after April 2005 shipped with Mac OS X v10.4 Tiger. The Intel-based Xserves were announced at the Worldwide Developers Conference on August 7,2006, the Intel Xserves now had on board video, freeing up an expansion slot. On January 8,2008 Xserve was updated to use Intel Xeon processors faster memory, the front-mounted FireWire 400 port featured in previous models was also replaced with a USB2.0 port. The Xserve RAID was discontinued on February 19,2008, on April 7,2009 Xserve was updated to use Intel Xeon processors DDR3 memory, and NVIDIA graphics with Mini DisplayPort output. The update also saw an increase to the storage capacity
