USB
USB is an industry standard that establishes specifications for cables and protocols for connection and power supply between personal computers and their peripheral devices. Released in 1996, the USB standard is maintained by the USB Implementers Forum. There have been three generations of USB specifications: USB 2.0 and USB 3.x. USB was designed to standardize the connection of peripherals like keyboards, pointing devices, digital still and video cameras, portable media players, disk drives and network adapters to personal computers, both to communicate and to supply electric power, it has replaced interfaces such as serial ports and parallel ports, has become commonplace on a wide range of devices. USB connectors have been replacing other types for battery chargers of portable devices; this section is intended to allow fast identification of USB receptacles on equipment. Further diagrams and discussion of plugs and receptacles can be found in the main article above; the Universal Serial Bus was developed to simplify and improve the interface between personal computers and peripheral devices, when compared with existing standard or ad-hoc proprietary interfaces.
From the computer user's perspective, the USB interface improved ease of use in several ways. The USB interface is self-configuring, so the user need not adjust settings on the device and interface for speed or data format, or configure interrupts, input/output addresses, or direct memory access channels. USB connectors are standardized at the host, so any peripheral can use any available receptacle. USB takes full advantage of the additional processing power that can be economically put into peripheral devices so that they can manage themselves; the USB interface is "hot pluggable", meaning devices can be exchanged without rebooting the host computer. Small devices can be powered directly from displacing extra power supply cables; because use of the USB logos is only permitted after compliance testing, the user can have confidence that a USB device will work as expected without extensive interaction with settings and configuration. Installation of a device relying on the USB standard requires minimal operator action.
When a device is plugged into a port on a running personal computer system, it is either automatically configured using existing device drivers, or the system prompts the user to locate a driver, installed and configured automatically. For hardware manufacturers and software developers, the USB standard eliminates the requirement to develop proprietary interfaces to new peripherals; the wide range of transfer speeds available from a USB interface suits devices ranging from keyboards and mice up to streaming video interfaces. A USB interface can be designed to provide the best available latency for time-critical functions, or can be set up to do background transfers of bulk data with little impact on system resources; the USB interface is generalized with no signal lines dedicated to only one function of one device. USB cables are limited in length, as the standard was meant to connect to peripherals on the same table-top, not between rooms or between buildings. However, a USB port can be connected to a gateway.
USB has "master-slave" protocol for addressing peripheral devices. Some extension to this limitation is possible through USB On-The-Go. A host cannot "broadcast" signals to all peripherals at once, each must be addressed individually; some high speed peripheral devices require sustained speeds not available in the USB standard. While converters exist between certain "legacy" interfaces and USB, they may not provide full implementation of the legacy hardware. For a product developer, use of USB requires implementation of a complex protocol and implies an "intelligent" controller in the peripheral device. Developers of USB devices intended for public sale must obtain a USB ID which requires a fee paid to the Implementers' Forum. Developers of products that use the USB specification must sign an agreement with Implementer's Forum. Use of the USB logos on the product require annual fees and membership in the organization. A group of seven companies began the development of USB in 1994: Compaq, DEC, IBM, Microsoft, NEC, Nortel.
The goal was to make it fundamentally easier to connect external devices to PCs by replacing the multitude of connectors at the back of PCs, addressing the usability issues of existing interfaces, simplifying software configuration of all devices connected to USB, as well as permitting greater data rates for external devices. Ajay Bhatt and his team worked on the standard at Intel; the original USB 1.0 specification, introduced in January 1996, defined data transfer rates of 1.5 Mbit/s Low Speed and 12 Mbit/s Full Speed. Microsoft Windows 95, OSR 2.1 provided OEM support for the devices. The first used version of USB was 1.1, released in September 1998. The 12 Mbit/s data rate was intended for higher-speed devices such as disk drives, the lower 1.5 Mbit/s rate for low data
Taipei
Taipei known as Taipei City, is the capital and a special municipality of Taiwan. Sitting at the northern tip of the island, Taipei City is an enclave of the municipality of New Taipei City that sits about 25 km southwest of the northern port city Keelung. Most of the city is located in an ancient lakebed; the basin is bounded by the narrow valleys of the Keelung and Xindian rivers, which join to form the Tamsui River along the city's western border. The city proper is home to an estimated population of 2,704,810, forming the core part of the Taipei–Keelung metropolitan area, which includes the nearby cities of New Taipei and Keelung with a population of 7,047,559, the 40th most-populous urban area in the world—roughly one-third of Taiwanese citizens live in the metro district; the name "Taipei" can refer either to the city proper. Taipei is the political, economic and cultural center of Taiwan and one of the major hubs in East Asia. Considered to be a global city and rated as an Alpha City by GaWC, Taipei is part of a major high-tech industrial area.
Railways, high-speed rail, highways and bus lines connect Taipei with all parts of the island. The city is served by two airports -- Taiwan Taoyuan. Taipei is home to various world-famous architectural or cultural landmarks, which include Taipei 101, Chiang Kai-shek Memorial Hall, Dalongdong Baoan Temple, Hsing Tian Kong, Lungshan Temple of Manka, National Palace Museum, Presidential Office Building, Taipei Guest House and several night markets dispersed throughout the city. Natural features such as Maokong and hot springs are well known to international visitors. In English-language news reports the name Taipei serves as a synecdoche referring to Taiwan's national government. Due to the ambiguous political status of Taiwan internationally, the term Chinese Taipei is sometimes pressed into service as a synonym for the entire country, as when Taiwan's governmental representatives participate in international organizations or Taiwan's athletes participate in international sporting events; the spelling Taipei derives from the Wade–Giles romanization T'ai-pei.
The name could be romanized as Táiběi according to Hanyu Pinyin and Tongyong Pinyin. Prior to the significant influx of Han Chinese immigrants, the region of Taipei Basin was inhabited by the Ketagalan plains aborigines; the number of Han immigrants increased in the early 18th century under Qing Dynasty rule after the government began permitting development in the area. In 1875, the northern part of the island was incorporated into the new Taipeh Prefecture; the Qing dynasty of China made Taipeh-fu the temporary capital of the island in 1887 when it was declared a province. Taipeh was formally made the provincial capital in 1894. Japan acquired Taiwan in 1895 under the Treaty of Shimonoseki after the First Sino-Japanese War. Taiwan became a colony of Imperial Japan with Taihoku as its capital; the city was administered under Taihoku Prefecture. Taiwan's Japanese rulers embarked on an extensive program of advanced urban planning that featured extensive railroad links. A number of Taipei landmarks and cultural institutions date from this period.
Following the surrender of Japan to the United States of America of 1945, effective control of Taiwan was handed to the Republic of China. After losing mainland China to the Chinese Communist Party in the Chinese Civil War, the ruling Kuomintang relocated the ROC government to Taiwan and declared Taipei the provisional capital of the ROC in December 1949. Taiwan's Kuomintang rulers regarded the city as the capital of Taiwan Province and their control as mandated by General Order No. 1. In 1990 Taipei provided the backdrop for the Wild Lily student rallies that moved Taiwanese society from one-party rule to multi-party democracy by 1996; the city has since served as the seat of Taiwan's democratically elected national government. The region known as the Taipei Basin was home to Ketagalan tribes before the eighteenth century. Han Chinese from Southern Fujian Province of Qing dynasty China began to settle in the Taipei Basin in 1709. In the late 19th century, the Taipei area, where the major Han Chinese settlements in northern Taiwan and one of the designated overseas trade ports, were located, gained economic importance due to the booming overseas trade that of tea export.
In 1875, the northern part of Taiwan was separated from Taiwan Prefecture and incorporated into the new Taipeh Prefecture as a new administrative entity of the Qing dynasty. Having been established adjoining the flourishing townships of Bangka and Twatutia, the new prefectural capital was known as Chengnei, "the inner city", government buildings were erected there. From 1875 until the beginning of Japanese rule in 1895, Taipei was part of Tamsui County of Taipeh Prefecture and the prefectural capital. In 1885, work commenced to govern the island as a province, Taipeh was temporarily made the provincial capital; the city became the capital in 1894. All that remains from the historical period is the north gate; the west gate and city walls were demolished by the Japanese while the south gate, little south gate, east gate were extensively modified by the Kuomintang and have lost much of their original character. As settlement for losing the First Sino-Japanese War, China ceded the island of Taiwan to the Empire of Japan in 1895 as part of the Treaty of Shimonoseki.
After the Japanese take-over, called Taihoku in Japanese
Silicon
Silicon is a chemical element with symbol Si and atomic number 14. It is a brittle crystalline solid with a blue-grey metallic lustre, it is a member of group 14 in the periodic table: carbon is above it. It is unreactive; because of its high chemical affinity for oxygen, it was not until 1823 that Jöns Jakob Berzelius was first able to prepare it and characterize it in pure form. Its melting and boiling points of 1414 °C and 3265 °C are the second-highest among all the metalloids and nonmetals, being only surpassed by boron. Silicon is the eighth most common element in the universe by mass, but rarely occurs as the pure element in the Earth's crust, it is most distributed in dusts, sands and planets as various forms of silicon dioxide or silicates. More than 90% of the Earth's crust is composed of silicate minerals, making silicon the second most abundant element in the Earth's crust after oxygen. Most silicon is used commercially without being separated, with little processing of the natural minerals.
Such use includes industrial construction with clays, silica sand, stone. Silicates are used in Portland cement for mortar and stucco, mixed with silica sand and gravel to make concrete for walkways and roads, they are used in whiteware ceramics such as porcelain, in traditional quartz-based soda-lime glass and many other specialty glasses. Silicon compounds such as silicon carbide are used as abrasives and components of high-strength ceramics. Silicon is the basis of the used synthetic polymers called silicones. Elemental silicon has a large impact on the modern world economy. Most free silicon is used in the steel refining, aluminium-casting, fine chemical industries. More visibly, the small portion of highly purified elemental silicon used in semiconductor electronics is essential to integrated circuits – most computers, cell phones, modern technology depend on it. Silicon is an essential element in biology. However, various sea sponges and microorganisms, such as diatoms and radiolaria, secrete skeletal structures made of silica.
Silica is deposited in many plant tissues. In 1787 Antoine Lavoisier suspected that silica might be an oxide of a fundamental chemical element, but the chemical affinity of silicon for oxygen is high enough that he had no means to reduce the oxide and isolate the element. After an attempt to isolate silicon in 1808, Sir Humphry Davy proposed the name "silicium" for silicon, from the Latin silex, silicis for flint, adding the "-ium" ending because he believed it to be a metal. Most other languages use transliterated forms of Davy's name, sometimes adapted to local phonology. A few others use instead a calque of the Latin root. Gay-Lussac and Thénard are thought to have prepared impure amorphous silicon in 1811, through the heating of isolated potassium metal with silicon tetrafluoride, but they did not purify and characterize the product, nor identify it as a new element. Silicon was given its present name in 1817 by Scottish chemist Thomas Thomson, he retained part of Davy's name but added "-on" because he believed that silicon was a nonmetal similar to boron and carbon.
In 1823, Jöns Jacob Berzelius prepared amorphous silicon using the same method as Gay-Lussac, but purifying the product to a brown powder by washing it. As a result, he is given credit for the element's discovery; the same year, Berzelius became the first to prepare silicon tetrachloride. Silicon in its more common crystalline form was not prepared until 31 years by Deville. By electrolyzing a mixture of sodium chloride and aluminium chloride containing 10% silicon, he was able to obtain a impure allotrope of silicon in 1854. More cost-effective methods have been developed to isolate several allotrope forms, the most recent being silicene in 2010. Meanwhile, research on the chemistry of silicon continued; the first organosilicon compound, was synthesised by Charles Friedel and James Crafts in 1863, but detailed characterisation of organosilicon chemistry was only done in the early 20th century by Frederic Kipping. Starting in the 1920s, the work of William Lawrence Bragg on X-ray crystallography elucidated the compositions of the silicates, known from analytical chemistry but had not yet been understood, together with Linus Pauling's development of crystal chemistry and Victor Goldschmidt's development of geochemistry.
The middle of the 20th century saw the development of the chemistry and industrial use of siloxanes and the growing use of silicone polymers and resins. In the late 20th century, the complexity of the crystal chemistry of silicides was mapped, along with the solid-state chemistry of doped semiconductors; because silicon is an important element in high-technology semiconductor devi
Pinyin
Hanyu Pinyin abbreviated to pinyin, is the official romanization system for Standard Chinese in mainland China and to some extent in Taiwan. It is used to teach Standard Mandarin Chinese, written using Chinese characters; the system includes four diacritics denoting tones. Pinyin without tone marks is used to spell Chinese names and words in languages written with the Latin alphabet, in certain computer input methods to enter Chinese characters; the pinyin system was developed in the 1950s by many linguists, including Zhou Youguang, based on earlier forms of romanizations of Chinese. It was published by revised several times; the International Organization for Standardization adopted pinyin as an international standard in 1982, was followed by the United Nations in 1986. The system was adopted as the official standard in Taiwan in 2009, where it is used for international events rather than for educational or computer-input purposes, but "some cities and organizations, notably in the south of Taiwan, did not accept this", so it remains one of several rival romanization systems in use.
The word Hànyǔ means'the spoken language of the Han people', while Pīnyīn means'spelled sounds'. In 1605, the Jesuit missionary Matteo Ricci published Xizi Qiji in Beijing; this was the first book to use the Roman alphabet to write the Chinese language. Twenty years another Jesuit in China, Nicolas Trigault, issued his Xi Ru Ermu Zi at Hangzhou. Neither book had much immediate impact on the way in which Chinese thought about their writing system, the romanizations they described were intended more for Westerners than for the Chinese. One of the earliest Chinese thinkers to relate Western alphabets to Chinese was late Ming to early Qing dynasty scholar-official, Fang Yizhi; the first late Qing reformer to propose that China adopt a system of spelling was Song Shu. A student of the great scholars Yu Yue and Zhang Taiyan, Song had been to Japan and observed the stunning effect of the kana syllabaries and Western learning there; this galvanized him into activity on a number of fronts, one of the most important being reform of the script.
While Song did not himself create a system for spelling Sinitic languages, his discussion proved fertile and led to a proliferation of schemes for phonetic scripts. The Wade–Giles system was produced by Thomas Wade in 1859, further improved by Herbert Giles in the Chinese–English Dictionary of 1892, it was popular and used in English-language publications outside China until 1979. In the early 1930s, Communist Party of China leaders trained in Moscow introduced a phonetic alphabet using Roman letters, developed in the Soviet Oriental Institute of Leningrad and was intended to improve literacy in the Russian Far East; this Sin Wenz or "New Writing" was much more linguistically sophisticated than earlier alphabets, but with the major exception that it did not indicate tones of Chinese. In 1940, several thousand members attended a Border Region Sin Wenz Society convention. Mao Zedong and Zhu De, head of the army, both contributed their calligraphy for the masthead of the Sin Wenz Society's new journal.
Outside the CCP, other prominent supporters included Sun Fo. Over thirty journals soon appeared written in Sin Wenz, plus large numbers of translations, some contemporary Chinese literature, a spectrum of textbooks. In 1940, the movement reached an apex when Mao's Border Region Government declared that the Sin Wenz had the same legal status as traditional characters in government and public documents. Many educators and political leaders looked forward to the day when they would be universally accepted and replace Chinese characters. Opposition arose, because the system was less well adapted to writing regional languages, therefore would require learning Mandarin. Sin Wenz fell into relative disuse during the following years. In 1943, the U. S. military engaged Yale University to develop a romanization of Mandarin Chinese for its pilots flying over China. The resulting system is close to pinyin, but does not use English letters in unfamiliar ways. Medial semivowels are written with y and w, apical vowels with r or z.
Accent marks are used to indicate tone. Pinyin was created by Chinese linguists, including Zhou Youguang, as part of a Chinese government project in the 1950s. Zhou is called "the father of pinyin," Zhou worked as a banker in New York when he decided to return to China to help rebuild the country after the establishment of the People's Republic of China in 1949, he became an economics professor in Shanghai, in 1955, when China's Ministry of Education created a Committee for the Reform of the Chinese Written Language, Premier Zhou Enlai assigned Zhou Youguang the task of developing a new romanization system, despite the fact that he was not a professional linguist. Hanyu Pinyin was based on several existing systems: Gwoyeu Romatzyh of 1928, Latinxua Sin Wenz of 1931, the diacritic markings from zhuyin. "I'm not the father of pinyin," Zhou said years later. It's a lo
Accelerated Graphics Port
The Accelerated Graphics Port was designed as a high-speed point-to-point channel for attaching a video card to a computer system to assist in the acceleration of 3D computer graphics. It was designed as a successor to PCI-type connections for video cards. Since 2004, AGP has been progressively phased out in favor of PCI Express; as computers became graphically oriented, successive generations of graphics adapters began to push the limits of PCI, a bus with shared bandwidth. This led to the development of a "bus" dedicated to graphics adapters. AGP is based on PCI, in fact the AGP bus is a superset of the conventional PCI bus, AGP cards must act as PCI cards; the primary advantage of AGP over PCI is that it provides a dedicated pathway between the slot and the processor rather than sharing the PCI bus. In addition to a lack of contention for the bus, the direct connection allows for higher clock speeds; the second major change is that AGP uses split transactions, where the address and data phases of a PCI transaction are separated.
The card may send many address phases, the host processes them in order. This avoids long delays, during read operations. Third, PCI bus handshaking is simplified. Unlike PCI bus transactions whose length is negotiated on a cycle-by-cycle basis using the FRAME# and STOP# signals, AGP transfers are always a multiple of 8 bytes long, the total length is included in the request. Further, rather than using the IRDY# and TRDY# signals for each word, data is transferred in blocks of four clock cycles, pauses are allowed only between blocks. AGP allows sideband addressing, meaning that the address and data buses are separated so the address phase does not use the main address/data lines at all; this is done by adding an extra 8-bit "SideBand Address" bus over which the graphics controller can issue new AGP requests while other AGP data is flowing over the main 32 address/data lines. This results in improved overall AGP data throughput; this great improvement in memory read performance makes it practical for an AGP card to read textures directly from system RAM, while a PCI graphics card must copy it from system RAM to the card's video memory.
System memory is made available using the graphics address remapping table, which apportions main memory as needed for texture storage. The maximum amount of system memory available to AGP is defined as the AGP aperture; the AGP slot first appeared on x86-compatible system boards based on Socket 7 Intel P5 Pentium and Slot 1 P6 Pentium II processors. Intel introduced AGP support with the i440LX Slot 1 chipset on August 26, 1997, a flood of products followed from all the major system board vendors; the first Socket 7 chipsets to support AGP were the VIA Apollo VP3, SiS 5591/5592, the ALI Aladdin V. Intel never released an AGP-equipped Socket 7 chipset. FIC demonstrated the first Socket 7 AGP system board in November 1997 as the FIC PA-2012 based on the VIA Apollo VP3 chipset, followed quickly by the EPoX P55-VP3 based on the VIA VP3 chipset, first to market. Early video chipsets featuring AGP support included the Rendition Vérité V2200, 3dfx Voodoo Banshee, Nvidia RIVA 128, 3Dlabs PERMEDIA 2, Intel i740, ATI Rage series, Matrox Millennium II, S3 ViRGE GX/2.
Some early AGP boards used graphics processors built around PCI and were bridged to AGP. This resulted in the cards benefiting little from the new bus, with the only improvement used being the 66 MHz bus clock, with its resulting doubled bandwidth over PCI, bus exclusivity. Examples of such cards were the Voodoo Banshee, Vérité V2200, Millennium II, S3 ViRGE GX/2. Intel's i740 was explicitly designed to exploit the new AGP feature set. After applying the patch the Windows 95 system became Windows 95 version 4.00.950 B. The first Windows NT-based operating system to receive AGP support was Windows NT 4.0 with Service Pack 3, introduced in 1997. Linux support for AGP enhanced fast data transfers was first added in 1999 with the implementation of the AGPgart kernel module. Intel released "AGP specification 1.0" in 1997. It specified 1 × and 2 × speeds. Specification 2.0 documented 1.5 V signaling, which could be used at 1×, 2× and the additional 4× speed and 3.0 added 0.8 V signaling, which could be operated at 4× and 8× speeds.
Available versions are listed in the adjacent table. AGP version 3.5 is only publicly mentioned by Microsoft under Universal Accelerated Graphics Port, which specifies mandatory supports of extra registers once marked optional under AGP 3.0. Upgraded registers include PCISTS, CAPPTR, NCAPID, AGPSTAT, AGPCMD, NISTAT, NICMD. New required registers include APBASELO, APBASEHI, AGPCTRL, APSIZE, NEPG, GARTLO, GARTHI. There are various physical interfaces. An official extension for cards that required more electrical power, with a longer slot with additional pins for that purpose. AGP Pro cards were workstation-class cards used to accelerate professional computer-aided design applications employed in the fields of architecture, engineering, simulations, a
Conventional PCI
Conventional PCI shortened to PCI, is a local computer bus for attaching hardware devices in a computer. PCI is part of the PCI Local Bus standard; the PCI bus supports the functions found on a processor bus but in a standardized format, independent of any particular processor's native bus. Devices connected to the PCI bus appear to a bus master to be connected directly to its own bus and are assigned addresses in the processor's address space, it is a parallel bus, synchronous to a single bus clock. Attached devices can take either the form of an integrated circuit fitted onto the motherboard itself or an expansion card that fits into a slot; the PCI Local Bus was first implemented in IBM PC compatibles, where it displaced the combination of several slow ISA slots and one fast VESA Local Bus slot as the bus configuration. It has subsequently been adopted for other computer types. Typical PCI cards used in PCs include: network cards, sound cards, extra ports such as USB or serial, TV tuner cards and disk controllers.
PCI video cards replaced ISA and VESA cards until growing bandwidth requirements outgrew the capabilities of PCI. The preferred interface for video cards became AGP, itself a superset of conventional PCI, before giving way to PCI Express; the first version of conventional PCI found in consumer desktop computers was a 32-bit bus using a 33 MHz bus clock and 5 V signalling, although the PCI 1.0 standard provided for a 64-bit variant as well. These have one locating notch in the card. Version 2.0 of the PCI standard introduced 3.3 V slots, physically distinguished by a flipped physical connector to prevent accidental insertion of 5 V cards. Universal cards, which can operate on either voltage, have two notches. Version 2.1 of the PCI standard introduced optional 66 MHz operation. A server-oriented variant of conventional PCI, called PCI-X operated at frequencies up to 133 MHz for PCI-X 1.0 and up to 533 MHz for PCI-X 2.0. An internal connector for laptop cards, called Mini PCI, was introduced in version 2.2 of the PCI specification.
The PCI bus was adopted for an external laptop connector standard – the CardBus. The first PCI specification was developed by Intel, but subsequent development of the standard became the responsibility of the PCI Special Interest Group. Conventional PCI and PCI-X are sometimes called Parallel PCI in order to distinguish them technologically from their more recent successor PCI Express, which adopted a serial, lane-based architecture. Conventional PCI's heyday in the desktop computer market was 1995–2005. PCI and PCI-X have become obsolete for most purposes. Many kinds of devices available on PCI expansion cards are now integrated onto motherboards or available in USB and PCI Express versions. Work on PCI began at Intel's Architecture Development Lab c. 1990. A team of Intel engineers defined the architecture and developed a proof of concept chipset and platform partnering with teams in the company's desktop PC systems and core logic product organizations. PCI was put to use in servers, replacing MCA and EISA as the server expansion bus of choice.
In mainstream PCs, PCI was slower to replace VESA Local Bus, did not gain significant market penetration until late 1994 in second-generation Pentium PCs. By 1996, VLB was all but extinct, manufacturers had adopted PCI for 486 computers. EISA continued to be used alongside PCI through 2000. Apple Computer adopted PCI for professional Power Macintosh computers in mid-1995, the consumer Performa product line in mid-1996; the 64-bit version of plain PCI remained rare in practice though, although it was used for example by all G3 and G4 Power Macintosh computers. Revisions of PCI added new features and performance improvements, including a 66 MHz 3.3 V standard and 133 MHz PCI-X, the adaptation of PCI signaling to other form factors. Both PCI-X 1.0b and PCI-X 2.0 are backward compatible with some PCI standards. These revisions were used on server hardware but consumer PC hardware remained nearly all 32 bit, 33 MHz and 5 volt; the PCI-SIG introduced the serial PCI Express in c. 2004. At the same time, they renamed PCI as Conventional PCI.
Since motherboard manufacturers have included progressively fewer Conventional PCI slots in favor of the new standard. Many new motherboards do not provide conventional PCI slots at all, as of late 2013. PCI provides separate memory and I/O port address spaces for the x86 processor family, 64 and 32 bits, respectively. Addresses in these address spaces are assigned by software. A third address space, called the PCI Configuration Space, which uses a fixed addressing scheme, allows software to determine the amount of memory and I/O address space needed by each device; each device can request up to six areas of memory space or I/O port space via its configuration space registers. In a typical system, the firmware queries all PCI buses at startup time to find out what devices are present and what system resources each needs, it allocates the resources and tells each device what its allocation is. The PCI configuration space contains a small amount of device type information, which helps an operating system choose device drivers for it, or at least to have a dialogue with a user about the system configuration.
Devices may have an on-board ROM containing executable code for x86 or PA-RISC processors, an Op
VIA C7
The VIA C7 is an x86 central processing unit designed by Centaur Technology and sold by VIA Technologies. The C7 delivers a number of improvements to the older VIA C3 cores but is nearly identical to the latest VIA C3 Nehemiah core; the C7 was launched in May 2005, although according to market reports, full volume production was not in place at that date. In May 2006 Intel's cross-licensing agreement with VIA expired and was not renewed, the reason for the forced termination of C3 shipments on March 31, 2006, as VIA lost rights to the socket 370; the C7 appears still to be found in the marketplace, for example, on the bargain-priced Everex TC2502, sold by Walmart with a Linux distribution preinstalled and on the HP Mini-Note. A 1 GHz C7 processor with 128kB of cache memory is used in VIA's own PX10000G motherboard, based on the proprietary Pico-ITX form factor; the chip is cooled by a large heatsink that covers most of a small 40 mm fan. In early April 2008 the schoolroom-use oriented, ultra-portable HP 2133 Mini-Note PC family debuted with an VIA-based, 1.0, 1.2 and 1.6 GHz C7-M processor portfolio, where the lowest speed model is optimized for running an SSD-based 4GB Linux distribution with a sub $500 price tag, while the middle tier carries Windows XP and the top model comes with Windows Vista Business, factory default.
HP chose the single-core VIA C7-M CPU in order to meet the fixed $499 starting price though Intel's competing Atom processor line debuted on 2 April 2008. The C7 is sold in five main versions: C7: for desktops / laptops - FCPGA Pentium-M package, 400, 533, 800 MHz FSB C7-M: for mobiles / embedded - NanoBGA2, 21mmx21mm, 400, 800 MHz FSB C7-M Ultra Low Voltage: for mobiles / embedded - NanoBGA2, 21mmx21mm, 400, 800 MHz FSB C7-D: similar to original C7, but RoHS-compliant and marketed as "carbon-free processor"; some variants do not support PowerSaver Eden: Some VIA Eden CPUs are based on a C7 core with low power consumption, package size, clock rates as low as 400 MHz. The Esther is the next evolution step of the Nehemiah+ core of the VIA C3 line-up. New Features of this core include: Average power consumption of less than 1 watt. 2 GHz operation and a TDP of 20 watts. L1 cache reduced from 32k instruction + 32k data to 16k instruction + 16k data, L2 cache increased from 64k to 128k, with associativity increased from 16-way set associative in C3 to 32-way set associative in C7.
VIA has stated the C7 bus is physically based upon the Pentium-M 479-pin packaging, but uses the proprietary VIA V4 bus for electrical signalling, instead of Intel’s AGTL+ Quad Pumped Bus, avoiding legal infringement. "Twin Turbo" technology, which consists of dual PLLs, one set at a high clock speed, the other set at a lower speed. This allows the processor's clock frequency to be adjusted in a single processor cycle. Lower switching latency means. Support for SSE2 and SSE3 extended instructions. NX bit in PAE mode that prevents buffer overflow software bugs from being exploitable by viruses or attackers. Hardware support for SHA-256 hashing. Hardware based "Montgomery multiplier" supporting key sizes up to 32K for public-key cryptography. C7 Esther as an evolutionary step after C3 Nehemiah, in which VIA / Centaur followed their traditional approach of balancing performance against a constrained transistor / power budget; the cornerstone of the C3 series chips' design philosophy has been that a simple in-order scalar core can offer reasonable performance against a complex superscalar out-of-order core if supported by an efficient "front-end", i.e. prefetch and branch prediction mechanisms.
In the case of C7, the design team have focused on further streamlining the of the chip, i.e. cache size and throughput as well as the prefetch system. At the same time no significant changes to the execution core of the chip; the C7 further closes the gap in performance with AMD / Intel chips, since clock speed is not thermally constrained. List of VIA C7 microprocessors List of VIA Eden microprocessors List of VIA microprocessors Intel Atom Netbook Smith, Van. "An inside look at the VIA C7-M". VIA Arena. Archived from the original on 2014-02-21. Review of the EPIA EN15000 with VIA C7 Processor VIA C7 Processor VIA C7-M Processor Detailed Platform Analysis in RightMark Memory Analyzer. Part 12: VIA C7/C7-M Processors, translated in English http://www.cpushack.com/VIA.html https://www.pricenfees.com/digit-life-archives/via-cyrix-iii-samuel-2-600-667-mhz https://web.archive.org/web/20060615180950/http://www.sandpile.org/impl/c5xl.htm
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