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Xilinx headquarters in the United States
S&P 500 Component
|Headquarters||San Jose, California, U.S.|
|Dennis Segers (Chairman of the Board); Victor Peng (President, CEO); Lorenzo A. Flores (Executive Vice President, CFO); Ivo Bolsens (Senior Vice President, CTO); Kevin Cooney (Senior Vice President, CIO); Emre Onder (Senior Vice President, Corporate strategy and marketing); Catia Hagopian (Senior Vice President, General counsel); Vincent L. Tong (Executive Vice President, Global operations and quality); Liam Madden (Executive Vice President, Hardware and systems product development); Matt Poirirer (Senior Vice President, Corporate development and investor relations); Salil Raje (Executive Vice President, Software and IP products); Marilyn Stiborek Meyer (Senior Vice President, Global human resources); Mark Wadlington (Senior Vice President, Global sales);.|
Number of employees
|3,800 - (April 2017)|
Xilinx, Inc. (// ZY-links) is an American technology company, primarily a supplier of programmable logic devices. It is known for inventing the field-programmable gate array (FPGA) and as the semiconductor company that created the first fabless manufacturing model.
Ross Freeman, Bernard Vonderschmitt, and James V Barnett II, former employees of Zilog, an integrated circuit and solid-state device manufacturer, co-founded Xilinx in 1984 with headquarters in San Jose, USA.
While working for Zilog, Freeman wanted to create chips that acted like a blank tape, allowing users to program the technology themselves. At the time, the concept was paradigm changing. "The concept required lots of transistors and, at that time, transistors were considered extremely precious—people thought that Ross's idea was pretty far out", said Xilinx Fellow Bill Carter, who when hired in 1984, as the first IC designer, was Xilinx's eighth employee.
Big semiconductor manufacturers were enjoying strong profits by producing massive volumes of generic circuits. Designing and manufacturing dozens of different circuits for specific markets offered lower profit margins and required greater manufacturing complexity. What became known as the FPGA would allow circuits produced in quantity to be tailored by individual market segments.
Freeman failed to convince Zilog to invest in creating the FPGA to chase what was only a $100 million market at the time. Freeman and Barnett left Zilog and teamed up with their 60-year-old ex-colleague Bernard Vonderschmitt to raise $4.5 million in venture funding to design the first commercially viable FPGA. They incorporated the company in 1984 and began selling its first product by 1985.
As demand for programmable logic continued to grow, so did Xilinx's revenues and profits.
From 1988 to 1990, the company's revenue grew each year from $30 million to $50 million to $100 million. During this time period, the company which had been providing funding to Xilinx, Monolithic Memories Inc. (MMI), was purchased by Xilinx competitor AMD. As a result, Xilinx dissolved the deal with MMI and went public on the NASDAQ in 1989. The company also moved to a 144,000-square-foot (13,400 m2) plant in San Jose, California in order to keep pace with demand from companies like HP, Apple Inc., IBM and Sun Microsystems who were buying large quantities from Xilinx.
The company reached $550 million in revenue in 1995, one decade after having sold its first product.
According to market research firm iSuppli, Xilinx has held the lead in programmable logic device market share since the late 1990s. Over the years, Xilinx expanded operations to India, Asia and Europe.
Xilinx's sales rose from $560 million in 1996 to $2.53 billion by the end of its fiscal year 2018. Moshe Gavrielov – an EDA and ASIC industry veteran who was appointed as president and CEO in early 2008 – introduced targeted design platforms that combine FPGAs with software, IP cores, boards and kits to address focused target applications. These targeted design platforms are an alternative to costly application-specific integrated circuits (ASICs) and application-specific standard products (ASSPs)..
On January 4, 2018 Victor Peng, company's COO, replaced Gavrielov in the role of CEO.
The company has expanded its product portfolio since its founding. Xilinx sells a broad range of FPGAs, complex programmable logic devices (CPLDs), design tools, intellectual property and reference designs. Xilinx also has a global services and training program.
In 2011, Xilinx introduced the Virtex-7 2000T, the first product based on 2.5D stacked silicon (based on silicon interposer technology) to deliver larger FPGAs than could be built using standard monolithic silicon. Xilinx then adapted the technology to combine formerly separate components in a single chip, first combining an FPGA with transceivers based on heterogeneous process technology to boost bandwidth capacity while using less power..
According to former Xilinx CEO Moshe Gavrielov, the addition of a heterogeneous communications device, combined with the introduction of new software tools and the Zynq-7000 line of 28 nm SoC devices that combine an ARM core with an FPGA, are part of shifting its position from a programmable logic device supplier to one delivering “all things programmable”.
In addition to Zynq-7000, Xilinx product lines (see Current Family Lines) include the Virtex, Kintex and Artix series, each including configurations and models optimized for different applications. With the introduction of the Xilinx 7 series in June, 2010, the company has moved to three major FPGA product families, the high-end Virtex, the mid-range Kintex family and the low-cost Artix family, retiring the Spartan brand, which ends with the Xilinx Series 6 FPGAs. In April 2012, the company introduced the Vivado Design Suite - a next-generation SoC-strength design environment for advanced electronic system designs. In May, 2014, the company shipped the first of the next generation FPGAs: the 20 nm UltraScale.
In September 2017, Amazon.com and Xilinx started a campaign for FPGA adoption. This campaign enables AWS Marketplace’s Amazon Machine Images (AMIs) with associated Amazon FPGA Instances created by partners. The two companies have released new software development tools to simplify the creation of the acceleration IP. AWS has built the tools to create and manage the machine images created and sold by partners.
Xilinx was founded in Silicon Valley in 1984 and headquartered in San Jose, USA, with additional offices in Longmont, USA; Dublin, Ireland; Singapore; Hyderabad, India; Beijing, China; Shanghai, China; Brisbane, Australia and Tokyo, Japan.
According to Bill Carter, a fellow at Xilinx, the choice of the name Xilinx refers to the chemical symbol for silicon Si. The 'X's at each end represent programmable logic blocks. The "linx" represents programmable links that connect the logic blocks together. As a result, this unique name was easier to register and met no objection.
Xilinx customers represent just over half of the entire programmable logic market, at 51%. Altera (now Intel ) is Xilinx's strongest competitor with 34% of the market. Other key players in this market are Actel (now Microsemi), and Lattice Semiconductor.
Xilinx designs, develops and markets programmable logic products, including integrated circuits (ICs), software design tools, predefined system functions delivered as intellectual property (IP) cores, design services, customer training, field engineering and technical support. Xilinx sells both FPGAs and CPLDs for electronic equipment manufacturers in end markets such as communications, industrial, consumer, automotive and data processing.
Xilinx's FPGAs have been used for the ALICE (A Large Ion Collider Experiment) at the CERN European laboratory on the French-Swiss border to map and disentangle the trajectories of thousands of subatomic particles. Xilinx has also engaged in a partnership with the United States Air Force Research Laboratory’s Space Vehicles Directorate to develop FPGAs to withstand the damaging effects of radiation in space, which are 1,000 times less sensitive to space radiation than the commercial equivalent, for deployment in new satellites.
Xilinx's IP cores include IP for simple functions (BCD encoders, counters, etc.), for domain specific cores (digital signal processing, FFT and FIR cores) to complex systems (multi-gigabit networking cores, the MicroBlaze soft microprocessor and the compact Picoblaze microcontroller). Xilinx also creates custom cores for a fee.
The main design toolkit Xilinx provides engineers is the Vivado Design Suite, an integrated design environment (IDE) with a system-to-IC level tools built on a shared scalable data model and a common debug environment. Vivado includes electronic system level (ESL) design tools for synthesizing and verifying C-based algorithmic IP; standards based packaging of both algorithmic and RTL IP for reuse; standards based IP stitching and systems integration of all types of system building blocks; and the verification of blocks and systems. A free version WebPACK Edition of Vivado provides designers with a limited version of the design environment.
Xilinx's Embedded Developer's Kit (EDK) supports the embedded PowerPC 405 and 440 cores (in Virtex-II Pro and some Virtex-4 and -5 chips) and the Microblaze core. Xilinx's System Generator for DSP implements DSP designs on Xilinx FPGAs. A freeware version of its EDA software called ISE WebPACK is used with some of its non-high-performance chips. Xilinx is the only (as of 2007) FPGA vendor to distribute a native Linux freeware synthesis toolchain.
Xilinx announced the architecture for a new ARM Cortex-A9-based platform for embedded systems designers, that combines the software programmability of an embedded processor with the hardware flexibility of an FPGA. The new architecture abstracts much of the hardware burden away from the embedded software developers' point of view, giving them an unprecedented level of control in the development process. With this platform, software developers can leverage their existing system code based on ARM technology and utilize vast off-the-shelf open-source and commercially available software component libraries. Because the system boots an OS at reset, software development can get under way quickly within familiar development and debug environments using tools such as ARM's RealView development suite and related third-party tools, Eclipse-based IDEs, GNU, the Xilinx Software Development Kit and others. In early 2011, Xilinx began shipping a new device family based on this architecture. The Zynq-7000 SoC platform immerses ARM multi-cores, programmable logic fabric, DSP data paths, memories and I/O functions in a dense and configurable mesh of interconnect. The platform targets embedded designers working on market applications that require multi-functionality and real-time responsiveness, such as automotive driver assistance, intelligent video surveillance, industrial automation, aerospace and defense, and next-generation wireless.
Following the introduction of its 28 nm 7-series FPGAs, Xilinx revealed that several of the highest-density parts in those FPGA product lines will be constructed using multiple dies in one package, employing technology developed for 3D construction and stacked-die assemblies. The company’s stacked silicon interconnect (SSI) technology stacks several (three or four) active FPGA dies side-by-side on a silicon interposer – a single piece of silicon that carries passive interconnect. The individual FPGA dies are conventional, and are flip-chip mounted by microbumps on to the interposer. The interposer provides direct interconnect between the FPGA dies, with no need for transceiver technologies such as high-speed SERDES. In October 2011, Xilinx shipped the first FPGA to use the new technology, the Virtex-7 2000T FPGA, which includes 6.8 billion transistors and 20 million ASIC gates. The following spring, Xilinx used 3D technology to ship the Virtex-7 HT, the industry’s first heterogeneous FPGAs, which combine high bandwidth FPGAs with a maximum of sixteen 28 Gbit/s and seventy-two 13.1 Gbit/s transceivers to reduce power and size requirements for key Nx100G and 400G line card applications and functions.
In January 2011, Xilinx acquired design tool firm AutoESL Design Technologies and added System C high-level design for its 6- and 7-series FPGA families. The addition of AutoESL tools extends the design community for FPGAs to designers more accustomed to designing at a higher level of abstraction using C, C++ and System C.
In April 2012, Xilinx introduced a revised version of its toolset for programmable systems, called Vivado Design Suite. This IP and system-centric design software supports newer high capacity devices, and speeds the design of programmable logic and I/O. Vivado provides faster integration and implementation for programmable systems into devices with 3D stacked silicon interconnect technology, ARM processing systems, analog mixed signal (AMS), and many semiconductor intellectual property (IP) cores.
Xilinx began his journey with the Reconfigurable Acceleration Stack technology in the late 2016. The company was providing software and IP blocks to accelerate Machine Learning and other datacenter apps. Xilinx's goal was to reduce the barriers to adoption of FPGAs for accelerated compute-intensive datacenter workloads.
Family lines of products
Prior to 2010, Xilinx offered two main FPGA families: the high-performance Virtex series and the high-volume Spartan series, with a cheaper EasyPath option for ramping to volume production. The company also provides two CPLD lines: the CoolRunner and the 9500 series. Each model series has been released in multiple generations since its launch. With the introduction of its 28 nm FPGAs in June 2010, Xilinx replaced the high-volume Spartan family with the Kintex family and the low-cost Artix family.
In newer FPGA products, Xilinx minimizes total power consumption by the adoption of a High-K Metal Gate (HKMG) process, which allows for low static power consumption. At the 28 nm node, static power is a significant portion of the total power dissipation of a device and in some cases is the dominant factor. Through the use of a HKMG process, Xilinx has reduced power use while increasing logic capacity. Virtex-6 and Spartan-6 FPGA families are said to consume 50 percent less power, and have up to twice the logic capacity compared to the previous generation of Xilinx FPGAs.
In June, 2010 Xilinx introduced the Xilinx 7 series: the Virtex-7, Kintex-7, and Artix-7 families, promising improvements in system power, performance, capacity, and price. These new FPGA families are manufactured using TSMC's 28 nm HKMG process. The 28 nm series 7 devices feature a 50 percent power reduction compared to the company's 40 nm devices and offer capacity of up to 2 million logic cells. Less than one year after announcing the 7 series 28 nm FPGAs, Xilinx shipped the world’s first 28 nm FPGA device, the Kintex-7, making this the programmable industry’s fastest product rollout. In March 2011, Xilinx introduced the Zynq-7000 family, which integrates a complete ARM Cortex-A9 MPCore processor-based system on a 28 nm FPGA for system architects and embedded software developers. In May 2017, Xilinx expanded the 7 Series with the production of the Spartan-7 family.
In Dec, 2013, Xilinx introduced the UltraScale series: Virtex UltraScale and Kintex UltraScale families. These new FPGA families are manufactured by TSMC in its 20 nm planar process. At the same time it announced an UltraScale SoC architecture, called Zynq UltraScale+ MPSoC, in TSMC 16 nm FinFET process.
The Virtex series of FPGAs have integrated features that include FIFO and ECC logic, DSP blocks, PCI-Express controllers, Ethernet MAC blocks, and high-speed transceivers. In addition to FPGA logic, the Virtex series includes embedded fixed function hardware for commonly used functions such as multipliers, memories, serial transceivers and microprocessor cores. These capabilities are used in applications such as wired and wireless infrastructure equipment, advanced medical equipment, test and measurement, and defense systems.
Xilinx's most recently announced Virtex, the Virtex 7 family, is based on a 28 nm design and is reported to deliver a two-fold system performance improvement at 50 percent lower power compared to previous generation Virtex-6 devices. In addition, Virtex-7 doubles the memory bandwidth compared to previous generation Virtex FPGAs with 1866 Mbit/s memory interfacing performance and over two million logic cells.
In 2011, Xilinx began shipping sample quantities of the Virtex-7 2000T "3D FPGA", which combines four smaller FPGAs into a single package by placing them on a special silicon interconnection pad (called an interposer) to deliver 6.8 billion transistors in a single large chip. The interposer provides 10,000 data pathways between the individual FPGAs – roughly 10 to 100 times more than would usually be available on a board – to create a single FPGA. In 2012, using the same 3D technology, Xilinx introduced initial shipments of their Virtex-7 H580T FPGA, a heterogeneous device, so called because it comprises two FPGA dies and one 8-channel 28Gbit/s transceiver die in the same package.
The Virtex-6 family is built on a 40 nm process for compute-intensive electronic systems, and the company claims it consumes 15 percent less power and has 15 percent improved performance over competing 40 nm FPGAs.
The Virtex-5 LX and the LXT are intended for logic-intensive applications, and the Virtex-5 SXT is for DSP applications. With the Virtex-5, Xilinx changed the logic fabric from four-input LUTs to six-input LUTs. With the increasing complexity of combinational logic functions required by SoC designs, the percentage of combinational paths requiring multiple four-input LUTs had become a performance and routing bottleneck. The new six-input LUT represented a tradeoff between better handling of increasingly complex combinational functions, at the expense of a reduction in the absolute number of LUTs per device. The Virtex-5 series is a 65 nm design fabricated in 1.0 V, triple-oxide process technology.
Legacy Virtex devices (Virtex, Virtex-II, Virtex-II Pro, Virtex 4) are still available, but are not recommended for use in new designs.
The Kintex-7 family is the first Xilinx mid-range FPGA family that the company claims delivers Virtex-6 family performance at less than half the price while consuming 50 percent less power. The Kintex family includes high-performance 12.5 Gbit/s or lower-cost optimized 6.5 Gbit/s serial connectivity, memory, and logic performance required for applications such as high volume 10G optical wired communication equipment, and provides a balance of signal processing performance, power consumption and cost to support the deployment of Long Term Evolution (LTE) wireless networks.
The Artix-7 family delivers 50 percent lower power and 35 percent lower cost compared to the Spartan-6 family and is based on the unified Virtex-series architecture. Xilinx claims that Artix-7 FPGAs deliver the performance required to address cost-sensitive, high-volume markets previously served by ASSPs, ASICs, and low-cost FPGAs. The Artix family is designed to address the small form factor and low-power performance requirements of battery-powered portable ultrasound equipment, commercial digital camera lens control, and military avionics and communications equipment. With the introduction of the Spartan-7 family in 2017, which lack high-bandwidth transceivers, the Artix-7's position in the Xilinx cost-optimized portfolio was clarified as being the "transceiver optimized" member.
The Zynq-7000 family of SoCs addresses high-end embedded-system applications, such as video surveillance, automotive-driver assistance, next-generation wireless, and factory automation. Zynq-7000 integrate a complete ARM Cortex-A9 MPCore-processor-based 28 nm system. The Zynq architecture differs from previous marriages of programmable logic and embedded processors by moving from an FPGA-centric platform to a processor-centric model. For software developers, Zynq-7000 appear the same as a standard, fully featured ARM processor-based system-on-chip (SOC), booting immediately at power-up and capable of running a variety of operating systems independently of the programmable logic. In 2013, Xilinx introduced the Zynq-7100, which integrates digital signal processing (DSP) to meet emerging programmable systems integration requirements of wireless, broadcast, medical and military applications.
The new Zynq-7000 product family posed a key challenge for system designers, because Xilinx ISE design software had not been developed to handle the capacity and complexity of designing with an FPGA with an ARM core. Xilinx's new Vivado Design Suite addressed this issue, because the software was developed for higher capacity FPGAs, and it included high level synthesis (HLS) functionality that allows engineers to compile the co-processors from a C-based description.
The Spartan-6 family is built on a 45-nanometer [nm], 9-metal layer, dual-oxide process technology. The Spartan-6 was marketed in 2009 as a low-cost option for automotive, wireless communications, flat-panel display and video surveillance applications.
The Spartan-7 family, built on the same 28nm process used in the other 7-Series FPGAs, was announced in 2015, and became available in 2017. Unlike the Artix-7 family and the "LXT" members of the Spartan-6 family, the Spartan-7 FPGAs lack high-bandwidth transceivers..
Because EasyPath devices are identical to the FPGAs that customers are already using, the parts can be produced faster and more reliably from the time they are ordered compared to similar competing programs.
Everest is Xilinx's 7nm generation architecture that targets datacenter acceleration applications, emerging fields and traditional markets. The Everest program focuses on the Adaptive Compute Acceleration Platform (ACAP), a new product category with better capabilities than an FPGA. It is an adaptive and integrated multi-core heterogeneous compute platform configurable at the hardware level. Its adaptability exceeds those of CPUs or GPUs. The core of ACAP contains a new generation of FPGA fabric with distributed memory and hardware-programmable DSP blocks, a multicore SoC, and some compute engines  connected through a network on chip (NoC). An ACAP is suitable for a range of applications in Big data and Artificial Intelligence, including video transcoding, database, data compression, search, AI inference, genomics, machine vision, computational storage and network acceleration.
Xilinx joined the Fortune ranks of the "100 Best Companies to Work For" in 2001 as No. 14, rose to No. 6 in 2002 and rose again to No. 4 in 2003.
In December 2008, GSA named Xilinx the Most Respected Public Semiconductor Company with $500 million to $10 billion in annual sales. The award recognizes excellence through success, vision and strategy in the industry.
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